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From: Gary Bisson <gary.bisson@boundarydevices.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] imx: mx8m: add memory mapping for CAAM and TCM
Date: Wed, 14 Nov 2018 17:55:28 +0100	[thread overview]
Message-ID: <20181114165529.6563-2-gary.bisson@boundarydevices.com> (raw)
In-Reply-To: <20181114165529.6563-1-gary.bisson@boundarydevices.com>

Otherwise can't boot the M4 core as it is impossible to load its
firmware into the TCM memory.

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
---
 arch/arm/mach-imx/mx8m/soc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/mach-imx/mx8m/soc.c b/arch/arm/mach-imx/mx8m/soc.c
index 46873aa8dd..11251c5f9a 100644
--- a/arch/arm/mach-imx/mx8m/soc.c
+++ b/arch/arm/mach-imx/mx8m/soc.c
@@ -77,6 +77,22 @@ static struct mm_region imx8m_mem_map[] = {
 		.size = 0x100000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_OUTER_SHARE
+	}, {
+		/* CAAM */
+		.virt = 0x100000UL,
+		.phys = 0x100000UL,
+		.size = 0x8000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* TCM */
+		.virt = 0x7C0000UL,
+		.phys = 0x7C0000UL,
+		.size = 0x80000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
 		/* OCRAM */
 		.virt = 0x900000UL,
-- 
2.19.1

  reply	other threads:[~2018-11-14 16:55 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-14 16:55 [U-Boot] [PATCH 0/2] imx: fix M4 boot on i.MX8MQ processors Gary Bisson
2018-11-14 16:55 ` Gary Bisson [this message]
2018-11-17 10:00   ` [U-Boot] [PATCH 1/2] imx: mx8m: add memory mapping for CAAM and TCM Peng Fan
2018-12-08 17:38   ` Stefano Babic
2018-11-14 16:55 ` [U-Boot] [PATCH 2/2] imx: bootaux: fix stack and pc assignment on 64-bit platforms Gary Bisson
2018-11-17 10:02   ` Peng Fan
2018-12-08 17:38   ` Stefano Babic

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