From mboxrd@z Thu Jan 1 00:00:00 1970 From: Gary Bisson Date: Wed, 14 Nov 2018 17:55:28 +0100 Subject: [U-Boot] [PATCH 1/2] imx: mx8m: add memory mapping for CAAM and TCM In-Reply-To: <20181114165529.6563-1-gary.bisson@boundarydevices.com> References: <20181114165529.6563-1-gary.bisson@boundarydevices.com> Message-ID: <20181114165529.6563-2-gary.bisson@boundarydevices.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Otherwise can't boot the M4 core as it is impossible to load its firmware into the TCM memory. Signed-off-by: Gary Bisson --- arch/arm/mach-imx/mx8m/soc.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/mach-imx/mx8m/soc.c b/arch/arm/mach-imx/mx8m/soc.c index 46873aa8dd..11251c5f9a 100644 --- a/arch/arm/mach-imx/mx8m/soc.c +++ b/arch/arm/mach-imx/mx8m/soc.c @@ -77,6 +77,22 @@ static struct mm_region imx8m_mem_map[] = { .size = 0x100000UL, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE + }, { + /* CAAM */ + .virt = 0x100000UL, + .phys = 0x100000UL, + .size = 0x8000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* TCM */ + .virt = 0x7C0000UL, + .phys = 0x7C0000UL, + .size = 0x80000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { /* OCRAM */ .virt = 0x900000UL, -- 2.19.1