From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [U-Boot, v4, 4/4] pinctrl: stm32: make pinctrl use hwspinlock
Date: Mon, 26 Nov 2018 22:13:07 -0500 [thread overview]
Message-ID: <20181127031307.GL11247@bill-the-cat> (raw)
In-Reply-To: <20181116140039.11628-5-benjamin.gaignard@st.com>
On Fri, Nov 16, 2018 at 03:00:39PM +0100, Benjamin Gaignard wrote:
> From: Benjamin Gaignard <benjamin.gaignard@linaro.org>
>
> Protect configuration registers with a hardware spinlock.
>
> If a hwspinlock is defined in the device-tree node used it
> to be sure that none of the others processors on the SoC could
> change the configuration at the same time.
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
[snip]
> @@ -200,4 +225,6 @@ U_BOOT_DRIVER(pinctrl_stm32) = {
> .of_match = stm32_pinctrl_ids,
> .ops = &stm32_pinctrl_ops,
> .bind = dm_scan_fdt_dev,
> + .probe = stm32_pinctrl_probe,
> + .priv_auto_alloc_size = sizeof(struct hwspinlock),
> };
This hunk here no longer applies directly and it's not obviously correct
to me how to fix it without also testing on hardware to be confident.
Please rebase the series, thanks!
--
Tom
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prev parent reply other threads:[~2018-11-27 3:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-16 14:00 [U-Boot] [PATCH v4 0/4] Add Hardware Spinlock class Benjamin Gaignard
2018-11-16 14:00 ` [U-Boot] [PATCH v4 1/4] dm: " Benjamin Gaignard
2018-11-16 14:00 ` [U-Boot] [PATCH v4 2/4] clk: stm32: add hardware spinlock clock Benjamin Gaignard
2018-11-16 14:00 ` [U-Boot] [PATCH v4 3/4] hwspinlock: add stm32 hardware spinlock support Benjamin Gaignard
2018-11-16 14:00 ` [U-Boot] [PATCH v4 4/4] pinctrl: stm32: make pinctrl use hwspinlock Benjamin Gaignard
2018-11-27 3:13 ` Tom Rini [this message]
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