* [U-Boot] [PATCH 1/3] serial: bcm6345: switch to raw I/O functions
2018-11-30 17:54 [U-Boot] [PATCH 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
@ 2018-11-30 17:55 ` Álvaro Fernández Rojas
2018-11-30 20:17 ` Daniel Schwierzeck
2018-11-30 17:55 ` [U-Boot] [PATCH 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32} Álvaro Fernández Rojas
` (2 subsequent siblings)
3 siblings, 1 reply; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-11-30 17:55 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
drivers/serial/serial_bcm6345.c | 100 ++++++++++++++++++++--------------------
1 file changed, 50 insertions(+), 50 deletions(-)
diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c
index a0e709a11e..2866b88c26 100644
--- a/drivers/serial/serial_bcm6345.c
+++ b/drivers/serial/serial_bcm6345.c
@@ -89,26 +89,26 @@ struct bcm6345_serial_priv {
/* enable rx & tx operation on uart */
static void bcm6345_serial_enable(void __iomem *base)
{
- setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+ setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+ UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
}
/* disable rx & tx operation on uart */
static void bcm6345_serial_disable(void __iomem *base)
{
- clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+ clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+ UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
}
/* clear all unread data in rx fifo and unsent data in tx fifo */
static void bcm6345_serial_flush(void __iomem *base)
{
/* empty rx and tx fifo */
- setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
- UART_CTL_RSTTXFIFO_MASK);
+ setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
+ UART_CTL_RSTTXFIFO_MASK);
/* read any pending char to make sure all irq status are cleared */
- readl_be(base + UART_FIFO_REG);
+ __raw_readl(base + UART_FIFO_REG);
}
static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
@@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
bcm6345_serial_flush(base);
/* set uart control config */
- clrsetbits_be32(base + UART_CTL_REG,
- /* clear rx timeout */
- UART_CTL_RXTIMEOUT_MASK |
- /* clear stop bits */
- UART_CTL_STOPBITS_MASK |
- /* clear bits per symbol */
- UART_CTL_BITSPERSYM_MASK |
- /* clear xmit break */
- UART_CTL_XMITBRK_MASK |
- /* clear reserved bit */
- UART_CTL_RSVD_MASK |
- /* disable parity */
- UART_CTL_RXPAREN_MASK |
- UART_CTL_TXPAREN_MASK |
- /* disable loopback */
- UART_CTL_LOOPBACK_MASK,
- /* set timeout to 5 */
- UART_CTL_RXTIMEOUT_5 |
- /* set 8 bits/symbol */
- UART_CTL_BITSPERSYM_8 |
- /* set 1 stop bit */
- UART_CTL_STOPBITS_1 |
- /* set parity to even */
- UART_CTL_RXPAREVEN_MASK |
- UART_CTL_TXPAREVEN_MASK);
+ clrsetbits_32(base + UART_CTL_REG,
+ /* clear rx timeout */
+ UART_CTL_RXTIMEOUT_MASK |
+ /* clear stop bits */
+ UART_CTL_STOPBITS_MASK |
+ /* clear bits per symbol */
+ UART_CTL_BITSPERSYM_MASK |
+ /* clear xmit break */
+ UART_CTL_XMITBRK_MASK |
+ /* clear reserved bit */
+ UART_CTL_RSVD_MASK |
+ /* disable parity */
+ UART_CTL_RXPAREN_MASK |
+ UART_CTL_TXPAREN_MASK |
+ /* disable loopback */
+ UART_CTL_LOOPBACK_MASK,
+ /* set timeout to 5 */
+ UART_CTL_RXTIMEOUT_5 |
+ /* set 8 bits/symbol */
+ UART_CTL_BITSPERSYM_8 |
+ /* set 1 stop bit */
+ UART_CTL_STOPBITS_1 |
+ /* set parity to even */
+ UART_CTL_RXPAREVEN_MASK |
+ UART_CTL_TXPAREVEN_MASK);
/* set uart fifo config */
- clrsetbits_be32(base + UART_FIFO_CFG_REG,
- /* clear fifo config */
- UART_FIFO_CFG_RX_MASK |
- UART_FIFO_CFG_TX_MASK,
- /* set fifo config to 4 */
- UART_FIFO_CFG_RX_4 |
- UART_FIFO_CFG_TX_4);
+ clrsetbits_32(base + UART_FIFO_CFG_REG,
+ /* clear fifo config */
+ UART_FIFO_CFG_RX_MASK |
+ UART_FIFO_CFG_TX_MASK,
+ /* set fifo config to 4 */
+ UART_FIFO_CFG_RX_4 |
+ UART_FIFO_CFG_TX_4);
/* set baud rate */
val = ((clk / baudrate) >> 4);
@@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
val = (val >> 1);
else
val = (val >> 1) - 1;
- writel_be(val, base + UART_BAUD_REG);
+ __raw_writel(val, base + UART_BAUD_REG);
/* clear interrupts */
- writel_be(0, base + UART_IR_REG);
+ __raw_writel(0, base + UART_IR_REG);
/* enable uart */
bcm6345_serial_enable(base);
@@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
static int bcm6345_serial_pending(struct udevice *dev, bool input)
{
struct bcm6345_serial_priv *priv = dev_get_priv(dev);
- u32 val = readl_be(priv->base + UART_IR_REG);
+ u32 val = __raw_readl(priv->base + UART_IR_REG);
if (input)
return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));
@@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch)
struct bcm6345_serial_priv *priv = dev_get_priv(dev);
u32 val;
- val = readl_be(priv->base + UART_IR_REG);
+ val = __raw_readl(priv->base + UART_IR_REG);
if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
return -EAGAIN;
- writel_be(ch, priv->base + UART_FIFO_REG);
+ __raw_writel(ch, priv->base + UART_FIFO_REG);
return 0;
}
@@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev)
struct bcm6345_serial_priv *priv = dev_get_priv(dev);
u32 val;
- val = readl_be(priv->base + UART_IR_REG);
+ val = __raw_readl(priv->base + UART_IR_REG);
if (val & UART_IR_STAT(UART_IR_RXOVER))
- setbits_be32(priv->base + UART_CTL_REG,
- UART_CTL_RSTRXFIFO_MASK);
+ setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK);
if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
return -EAGAIN;
- val = readl_be(priv->base + UART_FIFO_REG);
+ val = __raw_readl(priv->base + UART_FIFO_REG);
if (val & UART_FIFO_ANYERR_MASK)
return -EAGAIN;
@@ -264,6 +263,7 @@ U_BOOT_DRIVER(bcm6345_serial) = {
.probe = bcm6345_serial_probe,
.priv_auto_alloc_size = sizeof(struct bcm6345_serial_priv),
.ops = &bcm6345_serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
};
#ifdef CONFIG_DEBUG_UART_BCM6345
@@ -277,7 +277,7 @@ static inline void _debug_uart_init(void)
static inline void wait_xfered(void __iomem *base)
{
do {
- u32 val = readl_be(base + UART_IR_REG);
+ u32 val = __raw_readl(base + UART_IR_REG);
if (val & UART_IR_STAT(UART_IR_TXEMPTY))
break;
} while (1);
@@ -288,7 +288,7 @@ static inline void _debug_uart_putc(int ch)
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
wait_xfered(base);
- writel_be(ch, base + UART_FIFO_REG);
+ __raw_writel(ch, base + UART_FIFO_REG);
wait_xfered(base);
}
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [PATCH 1/3] serial: bcm6345: switch to raw I/O functions
2018-11-30 17:55 ` [U-Boot] [PATCH 1/3] " Álvaro Fernández Rojas
@ 2018-11-30 20:17 ` Daniel Schwierzeck
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Schwierzeck @ 2018-11-30 20:17 UTC (permalink / raw)
To: u-boot
Am 30.11.18 um 18:55 schrieb Álvaro Fernández Rojas:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
> drivers/serial/serial_bcm6345.c | 100 ++++++++++++++++++++--------------------
> 1 file changed, 50 insertions(+), 50 deletions(-)
>
> diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c
> index a0e709a11e..2866b88c26 100644
> --- a/drivers/serial/serial_bcm6345.c
> +++ b/drivers/serial/serial_bcm6345.c
> @@ -89,26 +89,26 @@ struct bcm6345_serial_priv {
> /* enable rx & tx operation on uart */
> static void bcm6345_serial_enable(void __iomem *base)
> {
> - setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
> - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
> + setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
> + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
> }
>
> /* disable rx & tx operation on uart */
> static void bcm6345_serial_disable(void __iomem *base)
> {
> - clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
> - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
> + clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
> + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
> }
>
> /* clear all unread data in rx fifo and unsent data in tx fifo */
> static void bcm6345_serial_flush(void __iomem *base)
> {
> /* empty rx and tx fifo */
> - setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
> - UART_CTL_RSTTXFIFO_MASK);
> + setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
> + UART_CTL_RSTTXFIFO_MASK);
>
> /* read any pending char to make sure all irq status are cleared */
> - readl_be(base + UART_FIFO_REG);
> + __raw_readl(base + UART_FIFO_REG);
if you always use native endianess on ARM and MIPS, you could use
readl(). On MIPS this will never swap except you enable
CONFIG_SWAP_IO_SPACE.
> }
>
> static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
> @@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
> bcm6345_serial_flush(base);
>
> /* set uart control config */
> - clrsetbits_be32(base + UART_CTL_REG,
> - /* clear rx timeout */
> - UART_CTL_RXTIMEOUT_MASK |
> - /* clear stop bits */
> - UART_CTL_STOPBITS_MASK |
> - /* clear bits per symbol */
> - UART_CTL_BITSPERSYM_MASK |
> - /* clear xmit break */
> - UART_CTL_XMITBRK_MASK |
> - /* clear reserved bit */
> - UART_CTL_RSVD_MASK |
> - /* disable parity */
> - UART_CTL_RXPAREN_MASK |
> - UART_CTL_TXPAREN_MASK |
> - /* disable loopback */
> - UART_CTL_LOOPBACK_MASK,
> - /* set timeout to 5 */
> - UART_CTL_RXTIMEOUT_5 |
> - /* set 8 bits/symbol */
> - UART_CTL_BITSPERSYM_8 |
> - /* set 1 stop bit */
> - UART_CTL_STOPBITS_1 |
> - /* set parity to even */
> - UART_CTL_RXPAREVEN_MASK |
> - UART_CTL_TXPAREVEN_MASK);
> + clrsetbits_32(base + UART_CTL_REG,
> + /* clear rx timeout */
> + UART_CTL_RXTIMEOUT_MASK |
> + /* clear stop bits */
> + UART_CTL_STOPBITS_MASK |
> + /* clear bits per symbol */
> + UART_CTL_BITSPERSYM_MASK |
> + /* clear xmit break */
> + UART_CTL_XMITBRK_MASK |
> + /* clear reserved bit */
> + UART_CTL_RSVD_MASK |
> + /* disable parity */
> + UART_CTL_RXPAREN_MASK |
> + UART_CTL_TXPAREN_MASK |
> + /* disable loopback */
> + UART_CTL_LOOPBACK_MASK,
> + /* set timeout to 5 */
> + UART_CTL_RXTIMEOUT_5 |
> + /* set 8 bits/symbol */
> + UART_CTL_BITSPERSYM_8 |
> + /* set 1 stop bit */
> + UART_CTL_STOPBITS_1 |
> + /* set parity to even */
> + UART_CTL_RXPAREVEN_MASK |
> + UART_CTL_TXPAREVEN_MASK);
>
> /* set uart fifo config */
> - clrsetbits_be32(base + UART_FIFO_CFG_REG,
> - /* clear fifo config */
> - UART_FIFO_CFG_RX_MASK |
> - UART_FIFO_CFG_TX_MASK,
> - /* set fifo config to 4 */
> - UART_FIFO_CFG_RX_4 |
> - UART_FIFO_CFG_TX_4);
> + clrsetbits_32(base + UART_FIFO_CFG_REG,
> + /* clear fifo config */
> + UART_FIFO_CFG_RX_MASK |
> + UART_FIFO_CFG_TX_MASK,
> + /* set fifo config to 4 */
> + UART_FIFO_CFG_RX_4 |
> + UART_FIFO_CFG_TX_4);
>
> /* set baud rate */
> val = ((clk / baudrate) >> 4);
> @@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
> val = (val >> 1);
> else
> val = (val >> 1) - 1;
> - writel_be(val, base + UART_BAUD_REG);
> + __raw_writel(val, base + UART_BAUD_REG);
>
> /* clear interrupts */
> - writel_be(0, base + UART_IR_REG);
> + __raw_writel(0, base + UART_IR_REG);
>
> /* enable uart */
> bcm6345_serial_enable(base);
> @@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
> static int bcm6345_serial_pending(struct udevice *dev, bool input)
> {
> struct bcm6345_serial_priv *priv = dev_get_priv(dev);
> - u32 val = readl_be(priv->base + UART_IR_REG);
> + u32 val = __raw_readl(priv->base + UART_IR_REG);
>
> if (input)
> return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));
> @@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch)
> struct bcm6345_serial_priv *priv = dev_get_priv(dev);
> u32 val;
>
> - val = readl_be(priv->base + UART_IR_REG);
> + val = __raw_readl(priv->base + UART_IR_REG);
> if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
> return -EAGAIN;
>
> - writel_be(ch, priv->base + UART_FIFO_REG);
> + __raw_writel(ch, priv->base + UART_FIFO_REG);
>
> return 0;
> }
> @@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev)
> struct bcm6345_serial_priv *priv = dev_get_priv(dev);
> u32 val;
>
> - val = readl_be(priv->base + UART_IR_REG);
> + val = __raw_readl(priv->base + UART_IR_REG);
> if (val & UART_IR_STAT(UART_IR_RXOVER))
> - setbits_be32(priv->base + UART_CTL_REG,
> - UART_CTL_RSTRXFIFO_MASK);
> + setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK);
> if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
> return -EAGAIN;
>
> - val = readl_be(priv->base + UART_FIFO_REG);
> + val = __raw_readl(priv->base + UART_FIFO_REG);
> if (val & UART_FIFO_ANYERR_MASK)
> return -EAGAIN;
>
> @@ -264,6 +263,7 @@ U_BOOT_DRIVER(bcm6345_serial) = {
> .probe = bcm6345_serial_probe,
> .priv_auto_alloc_size = sizeof(struct bcm6345_serial_priv),
> .ops = &bcm6345_serial_ops,
> + .flags = DM_FLAG_PRE_RELOC,
this was recently removed from all drivers, so it shouldn't be added again
> };
>
> #ifdef CONFIG_DEBUG_UART_BCM6345
> @@ -277,7 +277,7 @@ static inline void _debug_uart_init(void)
> static inline void wait_xfered(void __iomem *base)
> {
> do {
> - u32 val = readl_be(base + UART_IR_REG);
> + u32 val = __raw_readl(base + UART_IR_REG);
> if (val & UART_IR_STAT(UART_IR_TXEMPTY))
> break;
> } while (1);
> @@ -288,7 +288,7 @@ static inline void _debug_uart_putc(int ch)
> void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
>
> wait_xfered(base);
> - writel_be(ch, base + UART_FIFO_REG);
> + __raw_writel(ch, base + UART_FIFO_REG);
> wait_xfered(base);
> }
>
>
--
- Daniel
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
2018-11-30 17:54 [U-Boot] [PATCH 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
2018-11-30 17:55 ` [U-Boot] [PATCH 1/3] " Álvaro Fernández Rojas
@ 2018-11-30 17:55 ` Álvaro Fernández Rojas
2018-11-30 17:55 ` [U-Boot] [PATCH 3/3] serial: bcm6858: remove driver and switch to bcm6345 Álvaro Fernández Rojas
2018-12-01 17:42 ` [U-Boot] [PATCH v2 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
3 siblings, 0 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-11-30 17:55 UTC (permalink / raw)
To: u-boot
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="windows-1254", Size: 1983 bytes --]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/arm/include/asm/io.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 5df74728de..12bc7fbe06 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -160,7 +160,12 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
#define in_be32(a) in_arch(l,be32,a)
#define in_be16(a) in_arch(w,be16,a)
+#define out_32(a,v) __raw_writel(v,a)
+#define out_16(a,v) __raw_writew(v,a)
#define out_8(a,v) __raw_writeb(v,a)
+
+#define in_32(a) __raw_readl(a)
+#define in_16(a) __raw_readw(a)
#define in_8(a) __raw_readb(a)
#define clrbits(type, addr, clear) \
@@ -180,6 +185,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
#define setbits_le32(addr, set) setbits(le32, addr, set)
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+#define clrbits_32(addr, clear) clrbits(32, addr, clear)
+#define setbits_32(addr, set) setbits(32, addr, set)
+#define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
+
#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
#define setbits_be16(addr, set) setbits(be16, addr, set)
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
@@ -188,6 +197,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
#define setbits_le16(addr, set) setbits(le16, addr, set)
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+#define clrbits_16(addr, clear) clrbits(16, addr, clear)
+#define setbits_16(addr, set) setbits(16, addr, set)
+#define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
+
#define clrbits_8(addr, clear) clrbits(8, addr, clear)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [PATCH 3/3] serial: bcm6858: remove driver and switch to bcm6345
2018-11-30 17:54 [U-Boot] [PATCH 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
2018-11-30 17:55 ` [U-Boot] [PATCH 1/3] " Álvaro Fernández Rojas
2018-11-30 17:55 ` [U-Boot] [PATCH 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32} Álvaro Fernández Rojas
@ 2018-11-30 17:55 ` Álvaro Fernández Rojas
2018-12-01 17:42 ` [U-Boot] [PATCH v2 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
3 siblings, 0 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-11-30 17:55 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/arm/dts/bcm6858.dtsi | 2 +-
configs/bcm968580_ram_defconfig | 2 +-
drivers/serial/Kconfig | 8 +-
drivers/serial/Makefile | 1 -
drivers/serial/serial_bcm6858.c | 300 ----------------------------------------
5 files changed, 3 insertions(+), 310 deletions(-)
delete mode 100644 drivers/serial/serial_bcm6858.c
diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi
index 9869d729d3..d78d34d213 100644
--- a/arch/arm/dts/bcm6858.dtsi
+++ b/arch/arm/dts/bcm6858.dtsi
@@ -75,7 +75,7 @@
u-boot,dm-pre-reloc;
uart0: serial at ff800640 {
- compatible = "brcm,bcm6858-uart";
+ compatible = "brcm,bcm6345-uart";
reg = <0x0 0xff800640 0x0 0x18>;
clocks = <&periph_osc>;
diff --git a/configs/bcm968580_ram_defconfig b/configs/bcm968580_ram_defconfig
index abe90ee75f..4e10175a50 100644
--- a/configs/bcm968580_ram_defconfig
+++ b/configs/bcm968580_ram_defconfig
@@ -30,7 +30,7 @@ CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=0
CONFIG_DM_SERIAL=y
CONFIG_SERIAL_SEARCH_ALL=y
-CONFIG_BCM6858_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
CONFIG_SYSRESET=y
CONFIG_REGEX=y
# CONFIG_GENERATE_SMBIOS_TABLE is not set
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 3bcc61e731..6252dd8c4b 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -506,16 +506,10 @@ config BCM283X_PL011_SERIAL
config BCM6345_SERIAL
bool "Support for BCM6345 UART"
- depends on DM_SERIAL && ARCH_BMIPS
+ depends on DM_SERIAL
help
Select this to enable UART on BCM6345 SoCs.
-config BCM6858_SERIAL
- bool "Support for BCM6858 UART"
- depends on DM_SERIAL && ARCH_BCM6858
- help
- Select this to enable UART on BCM6358 SoCs.
-
config FSL_LINFLEXUART
bool "Freescale Linflex UART support"
depends on DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index b6377b1076..2f8d065a4c 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -35,7 +35,6 @@ obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
obj-$(CONFIG_ARM_DCC) += arm_dcc.o
obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
-obj-$(CONFIG_BCM6858_SERIAL) += serial_bcm6858.o
obj-$(CONFIG_EFI_APP) += serial_efi.o
obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
obj-$(CONFIG_MCFUART) += mcfuart.o
diff --git a/drivers/serial/serial_bcm6858.c b/drivers/serial/serial_bcm6858.c
deleted file mode 100644
index 8aa37055f0..0000000000
--- a/drivers/serial/serial_bcm6858.c
+++ /dev/null
@@ -1,300 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
- *
- * Derived from linux/drivers/tty/serial/bcm63xx_uart.c:
- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Derived from linux/drivers/tty/serial/serial_bcm6345.c
- * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
- */
-
-#include <clk.h>
-#include <dm.h>
-#include <debug_uart.h>
-#include <errno.h>
-#include <serial.h>
-#include <asm/io.h>
-#include <asm/types.h>
-
-/* UART Control register */
-#define UART_CTL_REG 0x0
-#define UART_CTL_RXTIMEOUT_MASK 0x1f
-#define UART_CTL_RXTIMEOUT_5 0x5
-#define UART_CTL_RSTRXFIFO_SHIFT 6
-#define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT)
-#define UART_CTL_RSTTXFIFO_SHIFT 7
-#define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT)
-#define UART_CTL_STOPBITS_SHIFT 8
-#define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT)
-#define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT)
-#define UART_CTL_BITSPERSYM_SHIFT 12
-#define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT)
-#define UART_CTL_BITSPERSYM_8 (0x3 << UART_CTL_BITSPERSYM_SHIFT)
-#define UART_CTL_XMITBRK_SHIFT 14
-#define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT)
-#define UART_CTL_RSVD_SHIFT 15
-#define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT)
-#define UART_CTL_RXPAREVEN_SHIFT 16
-#define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT)
-#define UART_CTL_RXPAREN_SHIFT 17
-#define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT)
-#define UART_CTL_TXPAREVEN_SHIFT 18
-#define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT)
-#define UART_CTL_TXPAREN_SHIFT 19
-#define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT)
-#define UART_CTL_LOOPBACK_SHIFT 20
-#define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT)
-#define UART_CTL_RXEN_SHIFT 21
-#define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT)
-#define UART_CTL_TXEN_SHIFT 22
-#define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT)
-#define UART_CTL_BRGEN_SHIFT 23
-#define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT)
-
-/* UART Baudword register */
-#define UART_BAUD_REG 0x4
-
-/* UART FIFO Config register */
-#define UART_FIFO_CFG_REG 0x8
-#define UART_FIFO_CFG_RX_SHIFT 8
-#define UART_FIFO_CFG_RX_MASK (0xf << UART_FIFO_CFG_RX_SHIFT)
-#define UART_FIFO_CFG_RX_4 (0x4 << UART_FIFO_CFG_RX_SHIFT)
-#define UART_FIFO_CFG_TX_SHIFT 12
-#define UART_FIFO_CFG_TX_MASK (0xf << UART_FIFO_CFG_TX_SHIFT)
-#define UART_FIFO_CFG_TX_4 (0x4 << UART_FIFO_CFG_TX_SHIFT)
-
-/* UART Interrupt register */
-#define UART_IR_REG 0x10
-#define UART_IR_STAT(x) (1 << (x))
-#define UART_IR_TXEMPTY 5
-#define UART_IR_RXOVER 7
-#define UART_IR_RXNOTEMPTY 11
-
-/* UART FIFO register */
-#define UART_FIFO_REG 0x14
-#define UART_FIFO_VALID_MASK 0xff
-#define UART_FIFO_FRAMEERR_SHIFT 8
-#define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT)
-#define UART_FIFO_PARERR_SHIFT 9
-#define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT)
-#define UART_FIFO_BRKDET_SHIFT 10
-#define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT)
-#define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \
- UART_FIFO_PARERR_MASK | \
- UART_FIFO_BRKDET_MASK)
-
-struct bcm6858_serial_priv {
- void __iomem *base;
- ulong uartclk;
-};
-
-/* enable rx & tx operation on uart */
-static void bcm6858_serial_enable(void __iomem *base)
-{
- setbits_le32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
-}
-
-/* disable rx & tx operation on uart */
-static void bcm6858_serial_disable(void __iomem *base)
-{
- clrbits_le32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
-}
-
-/* clear all unread data in rx fifo and unsent data in tx fifo */
-static void bcm6858_serial_flush(void __iomem *base)
-{
- /* empty rx and tx fifo */
- setbits_le32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
- UART_CTL_RSTTXFIFO_MASK);
-
- /* read any pending char to make sure all irq status are cleared */
- readl(base + UART_FIFO_REG);
-}
-
-static int bcm6858_serial_init(void __iomem *base, ulong clk, u32 baudrate)
-{
- u32 val;
-
- /* mask all irq and flush port */
- bcm6858_serial_disable(base);
- bcm6858_serial_flush(base);
-
- /* set uart control config */
- clrsetbits_le32(base + UART_CTL_REG,
- /* clear rx timeout */
- UART_CTL_RXTIMEOUT_MASK |
- /* clear stop bits */
- UART_CTL_STOPBITS_MASK |
- /* clear bits per symbol */
- UART_CTL_BITSPERSYM_MASK |
- /* clear xmit break */
- UART_CTL_XMITBRK_MASK |
- /* clear reserved bit */
- UART_CTL_RSVD_MASK |
- /* disable parity */
- UART_CTL_RXPAREN_MASK |
- UART_CTL_TXPAREN_MASK |
- /* disable loopback */
- UART_CTL_LOOPBACK_MASK,
- /* set timeout to 5 */
- UART_CTL_RXTIMEOUT_5 |
- /* set 8 bits/symbol */
- UART_CTL_BITSPERSYM_8 |
- /* set 1 stop bit */
- UART_CTL_STOPBITS_1 |
- /* set parity to even */
- UART_CTL_RXPAREVEN_MASK |
- UART_CTL_TXPAREVEN_MASK);
-
- /* set uart fifo config */
- clrsetbits_le32(base + UART_FIFO_CFG_REG,
- /* clear fifo config */
- UART_FIFO_CFG_RX_MASK |
- UART_FIFO_CFG_TX_MASK,
- /* set fifo config to 4 */
- UART_FIFO_CFG_RX_4 |
- UART_FIFO_CFG_TX_4);
-
- /* set baud rate */
- val = ((clk / baudrate) >> 4);
- if (val & 0x1)
- val = (val >> 1);
- else
- val = (val >> 1) - 1;
- writel(val, base + UART_BAUD_REG);
-
- /* clear interrupts */
- writel(0, base + UART_IR_REG);
-
- /* enable uart */
- bcm6858_serial_enable(base);
-
- return 0;
-}
-
-static int bcm6858_serial_pending(struct udevice *dev, bool input)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- u32 val = readl(priv->base + UART_IR_REG);
-
- if (input)
- return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));
- else
- return !(val & UART_IR_STAT(UART_IR_TXEMPTY));
-}
-
-static int bcm6858_serial_setbrg(struct udevice *dev, int baudrate)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
-
- return bcm6858_serial_init(priv->base, priv->uartclk, baudrate);
-}
-
-static int bcm6858_serial_putc(struct udevice *dev, const char ch)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- u32 val;
-
- val = readl(priv->base + UART_IR_REG);
- if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
- return -EAGAIN;
-
- writel(ch, priv->base + UART_FIFO_REG);
-
- return 0;
-}
-
-static int bcm6858_serial_getc(struct udevice *dev)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- u32 val;
-
- val = readl(priv->base + UART_IR_REG);
- if (val & UART_IR_STAT(UART_IR_RXOVER))
- setbits_le32(priv->base + UART_CTL_REG,
- UART_CTL_RSTRXFIFO_MASK);
-
- if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
- return -EAGAIN;
-
- val = readl(priv->base + UART_FIFO_REG);
- if (val & UART_FIFO_ANYERR_MASK)
- return -EAGAIN;
-
- return val & UART_FIFO_VALID_MASK;
-}
-
-static int bcm6858_serial_probe(struct udevice *dev)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- struct clk clk;
- int ret;
-
- /* get address */
- priv->base = dev_remap_addr(dev);
- if (!priv->base)
- return -EINVAL;
-
- /* get clock rate */
- ret = clk_get_by_index(dev, 0, &clk);
- if (ret < 0)
- return ret;
- priv->uartclk = clk_get_rate(&clk);
- clk_free(&clk);
-
- /* initialize serial */
- return bcm6858_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);
-}
-
-static const struct dm_serial_ops bcm6858_serial_ops = {
- .putc = bcm6858_serial_putc,
- .pending = bcm6858_serial_pending,
- .getc = bcm6858_serial_getc,
- .setbrg = bcm6858_serial_setbrg,
-};
-
-static const struct udevice_id bcm6858_serial_ids[] = {
- { .compatible = "brcm,bcm6858-uart" },
- { /* sentinel */ }
-};
-
-U_BOOT_DRIVER(bcm6858_serial) = {
- .name = "bcm6858-uart",
- .id = UCLASS_SERIAL,
- .of_match = bcm6858_serial_ids,
- .probe = bcm6858_serial_probe,
- .priv_auto_alloc_size = sizeof(struct bcm6858_serial_priv),
- .ops = &bcm6858_serial_ops,
- .flags = DM_FLAG_PRE_RELOC,
-};
-
-#ifdef CONFIG_DEBUG_UART_BCM6858
-static inline void _debug_uart_init(void)
-{
- void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
-
- bcm6858_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
-}
-
-static inline void wait_xfered(void __iomem *base)
-{
- do {
- u32 val = readl(base + UART_IR_REG);
- if (val & UART_IR_STAT(UART_IR_TXEMPTY))
- break;
- } while (1);
-}
-
-static inline void _debug_uart_putc(int ch)
-{
- void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
-
- wait_xfered(base);
- writel(ch, base + UART_FIFO_REG);
- wait_xfered(base);
-}
-
-DEBUG_UART_FUNCS
-#endif
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [PATCH v2 0/3] serial: bcm6345: switch to raw I/O functions
2018-11-30 17:54 [U-Boot] [PATCH 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
` (2 preceding siblings ...)
2018-11-30 17:55 ` [U-Boot] [PATCH 3/3] serial: bcm6858: remove driver and switch to bcm6345 Álvaro Fernández Rojas
@ 2018-12-01 17:42 ` Álvaro Fernández Rojas
2018-12-01 17:42 ` [U-Boot] [PATCH v2 1/3] " Álvaro Fernández Rojas
` (2 more replies)
3 siblings, 3 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-12-01 17:42 UTC (permalink / raw)
To: u-boot
These patches allow to use bcm6345 uart driver for both BE and LE,
making bcm6858 serial driver unneeded.
Álvaro Fernández Rojas (3):
serial: bcm6345: switch to raw I/O functions
arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
serial: bcm6858: remove driver and switch to bcm6345
arch/arm/dts/bcm6858.dtsi | 2 +-
arch/arm/include/asm/io.h | 13 ++
configs/bcm968580_ram_defconfig | 2 +-
drivers/serial/Kconfig | 8 +-
drivers/serial/Makefile | 1 -
drivers/serial/serial_bcm6345.c | 99 +++++++------
drivers/serial/serial_bcm6858.c | 300 ----------------------------------------
7 files changed, 65 insertions(+), 360 deletions(-)
delete mode 100644 drivers/serial/serial_bcm6858.c
--
2.11.0
^ permalink raw reply [flat|nested] 12+ messages in thread* [U-Boot] [PATCH v2 1/3] serial: bcm6345: switch to raw I/O functions
2018-12-01 17:42 ` [U-Boot] [PATCH v2 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
@ 2018-12-01 17:42 ` Álvaro Fernández Rojas
2018-12-07 20:33 ` [U-Boot] [U-Boot, v2, " Tom Rini
2018-12-01 17:42 ` [U-Boot] [PATCH v2 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32} Álvaro Fernández Rojas
2018-12-01 17:42 ` [U-Boot] [PATCH v2 3/3] serial: bcm6858: remove driver and switch to bcm6345 Álvaro Fernández Rojas
2 siblings, 1 reply; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-12-01 17:42 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
v2: introduce changes suggested by Daniel Schwierzeck:
- Use readl/writel instead of __raw_readl/__raw_writel.
- Remove DM_FLAG_PRE_RELOC.
drivers/serial/serial_bcm6345.c | 99 ++++++++++++++++++++---------------------
1 file changed, 49 insertions(+), 50 deletions(-)
diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c
index a0e709a11e..9ad8c770d5 100644
--- a/drivers/serial/serial_bcm6345.c
+++ b/drivers/serial/serial_bcm6345.c
@@ -89,26 +89,26 @@ struct bcm6345_serial_priv {
/* enable rx & tx operation on uart */
static void bcm6345_serial_enable(void __iomem *base)
{
- setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+ setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+ UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
}
/* disable rx & tx operation on uart */
static void bcm6345_serial_disable(void __iomem *base)
{
- clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+ clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+ UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
}
/* clear all unread data in rx fifo and unsent data in tx fifo */
static void bcm6345_serial_flush(void __iomem *base)
{
/* empty rx and tx fifo */
- setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
- UART_CTL_RSTTXFIFO_MASK);
+ setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
+ UART_CTL_RSTTXFIFO_MASK);
/* read any pending char to make sure all irq status are cleared */
- readl_be(base + UART_FIFO_REG);
+ readl(base + UART_FIFO_REG);
}
static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
@@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
bcm6345_serial_flush(base);
/* set uart control config */
- clrsetbits_be32(base + UART_CTL_REG,
- /* clear rx timeout */
- UART_CTL_RXTIMEOUT_MASK |
- /* clear stop bits */
- UART_CTL_STOPBITS_MASK |
- /* clear bits per symbol */
- UART_CTL_BITSPERSYM_MASK |
- /* clear xmit break */
- UART_CTL_XMITBRK_MASK |
- /* clear reserved bit */
- UART_CTL_RSVD_MASK |
- /* disable parity */
- UART_CTL_RXPAREN_MASK |
- UART_CTL_TXPAREN_MASK |
- /* disable loopback */
- UART_CTL_LOOPBACK_MASK,
- /* set timeout to 5 */
- UART_CTL_RXTIMEOUT_5 |
- /* set 8 bits/symbol */
- UART_CTL_BITSPERSYM_8 |
- /* set 1 stop bit */
- UART_CTL_STOPBITS_1 |
- /* set parity to even */
- UART_CTL_RXPAREVEN_MASK |
- UART_CTL_TXPAREVEN_MASK);
+ clrsetbits_32(base + UART_CTL_REG,
+ /* clear rx timeout */
+ UART_CTL_RXTIMEOUT_MASK |
+ /* clear stop bits */
+ UART_CTL_STOPBITS_MASK |
+ /* clear bits per symbol */
+ UART_CTL_BITSPERSYM_MASK |
+ /* clear xmit break */
+ UART_CTL_XMITBRK_MASK |
+ /* clear reserved bit */
+ UART_CTL_RSVD_MASK |
+ /* disable parity */
+ UART_CTL_RXPAREN_MASK |
+ UART_CTL_TXPAREN_MASK |
+ /* disable loopback */
+ UART_CTL_LOOPBACK_MASK,
+ /* set timeout to 5 */
+ UART_CTL_RXTIMEOUT_5 |
+ /* set 8 bits/symbol */
+ UART_CTL_BITSPERSYM_8 |
+ /* set 1 stop bit */
+ UART_CTL_STOPBITS_1 |
+ /* set parity to even */
+ UART_CTL_RXPAREVEN_MASK |
+ UART_CTL_TXPAREVEN_MASK);
/* set uart fifo config */
- clrsetbits_be32(base + UART_FIFO_CFG_REG,
- /* clear fifo config */
- UART_FIFO_CFG_RX_MASK |
- UART_FIFO_CFG_TX_MASK,
- /* set fifo config to 4 */
- UART_FIFO_CFG_RX_4 |
- UART_FIFO_CFG_TX_4);
+ clrsetbits_32(base + UART_FIFO_CFG_REG,
+ /* clear fifo config */
+ UART_FIFO_CFG_RX_MASK |
+ UART_FIFO_CFG_TX_MASK,
+ /* set fifo config to 4 */
+ UART_FIFO_CFG_RX_4 |
+ UART_FIFO_CFG_TX_4);
/* set baud rate */
val = ((clk / baudrate) >> 4);
@@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
val = (val >> 1);
else
val = (val >> 1) - 1;
- writel_be(val, base + UART_BAUD_REG);
+ writel(val, base + UART_BAUD_REG);
/* clear interrupts */
- writel_be(0, base + UART_IR_REG);
+ writel(0, base + UART_IR_REG);
/* enable uart */
bcm6345_serial_enable(base);
@@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
static int bcm6345_serial_pending(struct udevice *dev, bool input)
{
struct bcm6345_serial_priv *priv = dev_get_priv(dev);
- u32 val = readl_be(priv->base + UART_IR_REG);
+ u32 val = readl(priv->base + UART_IR_REG);
if (input)
return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));
@@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch)
struct bcm6345_serial_priv *priv = dev_get_priv(dev);
u32 val;
- val = readl_be(priv->base + UART_IR_REG);
+ val = readl(priv->base + UART_IR_REG);
if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
return -EAGAIN;
- writel_be(ch, priv->base + UART_FIFO_REG);
+ writel(ch, priv->base + UART_FIFO_REG);
return 0;
}
@@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev)
struct bcm6345_serial_priv *priv = dev_get_priv(dev);
u32 val;
- val = readl_be(priv->base + UART_IR_REG);
+ val = readl(priv->base + UART_IR_REG);
if (val & UART_IR_STAT(UART_IR_RXOVER))
- setbits_be32(priv->base + UART_CTL_REG,
- UART_CTL_RSTRXFIFO_MASK);
+ setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK);
if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
return -EAGAIN;
- val = readl_be(priv->base + UART_FIFO_REG);
+ val = readl(priv->base + UART_FIFO_REG);
if (val & UART_FIFO_ANYERR_MASK)
return -EAGAIN;
@@ -277,7 +276,7 @@ static inline void _debug_uart_init(void)
static inline void wait_xfered(void __iomem *base)
{
do {
- u32 val = readl_be(base + UART_IR_REG);
+ u32 val = readl(base + UART_IR_REG);
if (val & UART_IR_STAT(UART_IR_TXEMPTY))
break;
} while (1);
@@ -288,7 +287,7 @@ static inline void _debug_uart_putc(int ch)
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
wait_xfered(base);
- writel_be(ch, base + UART_FIFO_REG);
+ writel(ch, base + UART_FIFO_REG);
wait_xfered(base);
}
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [PATCH v2 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
2018-12-01 17:42 ` [U-Boot] [PATCH v2 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
2018-12-01 17:42 ` [U-Boot] [PATCH v2 1/3] " Álvaro Fernández Rojas
@ 2018-12-01 17:42 ` Álvaro Fernández Rojas
2018-12-07 20:34 ` [U-Boot] [U-Boot, v2, " Tom Rini
2018-12-01 17:42 ` [U-Boot] [PATCH v2 3/3] serial: bcm6858: remove driver and switch to bcm6345 Álvaro Fernández Rojas
2 siblings, 1 reply; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-12-01 17:42 UTC (permalink / raw)
To: u-boot
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="windows-1254", Size: 2000 bytes --]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
v2: no changes
arch/arm/include/asm/io.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 5df74728de..12bc7fbe06 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -160,7 +160,12 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
#define in_be32(a) in_arch(l,be32,a)
#define in_be16(a) in_arch(w,be16,a)
+#define out_32(a,v) __raw_writel(v,a)
+#define out_16(a,v) __raw_writew(v,a)
#define out_8(a,v) __raw_writeb(v,a)
+
+#define in_32(a) __raw_readl(a)
+#define in_16(a) __raw_readw(a)
#define in_8(a) __raw_readb(a)
#define clrbits(type, addr, clear) \
@@ -180,6 +185,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
#define setbits_le32(addr, set) setbits(le32, addr, set)
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+#define clrbits_32(addr, clear) clrbits(32, addr, clear)
+#define setbits_32(addr, set) setbits(32, addr, set)
+#define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
+
#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
#define setbits_be16(addr, set) setbits(be16, addr, set)
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
@@ -188,6 +197,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
#define setbits_le16(addr, set) setbits(le16, addr, set)
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+#define clrbits_16(addr, clear) clrbits(16, addr, clear)
+#define setbits_16(addr, set) setbits(16, addr, set)
+#define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
+
#define clrbits_8(addr, clear) clrbits(8, addr, clear)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [U-Boot] [U-Boot, v2, 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
2018-12-01 17:42 ` [U-Boot] [PATCH v2 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32} Álvaro Fernández Rojas
@ 2018-12-07 20:34 ` Tom Rini
0 siblings, 0 replies; 12+ messages in thread
From: Tom Rini @ 2018-12-07 20:34 UTC (permalink / raw)
To: u-boot
On Sat, Dec 01, 2018 at 06:42:08PM +0100, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 3/3] serial: bcm6858: remove driver and switch to bcm6345
2018-12-01 17:42 ` [U-Boot] [PATCH v2 0/3] serial: bcm6345: switch to raw I/O functions Álvaro Fernández Rojas
2018-12-01 17:42 ` [U-Boot] [PATCH v2 1/3] " Álvaro Fernández Rojas
2018-12-01 17:42 ` [U-Boot] [PATCH v2 2/3] arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32} Álvaro Fernández Rojas
@ 2018-12-01 17:42 ` Álvaro Fernández Rojas
2018-12-07 20:34 ` [U-Boot] [U-Boot, v2, " Tom Rini
2 siblings, 1 reply; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-12-01 17:42 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
v2: no changes
arch/arm/dts/bcm6858.dtsi | 2 +-
configs/bcm968580_ram_defconfig | 2 +-
drivers/serial/Kconfig | 8 +-
drivers/serial/Makefile | 1 -
drivers/serial/serial_bcm6858.c | 300 ----------------------------------------
5 files changed, 3 insertions(+), 310 deletions(-)
delete mode 100644 drivers/serial/serial_bcm6858.c
diff --git a/arch/arm/dts/bcm6858.dtsi b/arch/arm/dts/bcm6858.dtsi
index 9869d729d3..d78d34d213 100644
--- a/arch/arm/dts/bcm6858.dtsi
+++ b/arch/arm/dts/bcm6858.dtsi
@@ -75,7 +75,7 @@
u-boot,dm-pre-reloc;
uart0: serial at ff800640 {
- compatible = "brcm,bcm6858-uart";
+ compatible = "brcm,bcm6345-uart";
reg = <0x0 0xff800640 0x0 0x18>;
clocks = <&periph_osc>;
diff --git a/configs/bcm968580_ram_defconfig b/configs/bcm968580_ram_defconfig
index abe90ee75f..4e10175a50 100644
--- a/configs/bcm968580_ram_defconfig
+++ b/configs/bcm968580_ram_defconfig
@@ -30,7 +30,7 @@ CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=0
CONFIG_DM_SERIAL=y
CONFIG_SERIAL_SEARCH_ALL=y
-CONFIG_BCM6858_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
CONFIG_SYSRESET=y
CONFIG_REGEX=y
# CONFIG_GENERATE_SMBIOS_TABLE is not set
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 3bcc61e731..6252dd8c4b 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -506,16 +506,10 @@ config BCM283X_PL011_SERIAL
config BCM6345_SERIAL
bool "Support for BCM6345 UART"
- depends on DM_SERIAL && ARCH_BMIPS
+ depends on DM_SERIAL
help
Select this to enable UART on BCM6345 SoCs.
-config BCM6858_SERIAL
- bool "Support for BCM6858 UART"
- depends on DM_SERIAL && ARCH_BCM6858
- help
- Select this to enable UART on BCM6358 SoCs.
-
config FSL_LINFLEXUART
bool "Freescale Linflex UART support"
depends on DM_SERIAL
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index b6377b1076..2f8d065a4c 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -35,7 +35,6 @@ obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
obj-$(CONFIG_ARM_DCC) += arm_dcc.o
obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
-obj-$(CONFIG_BCM6858_SERIAL) += serial_bcm6858.o
obj-$(CONFIG_EFI_APP) += serial_efi.o
obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
obj-$(CONFIG_MCFUART) += mcfuart.o
diff --git a/drivers/serial/serial_bcm6858.c b/drivers/serial/serial_bcm6858.c
deleted file mode 100644
index 8aa37055f0..0000000000
--- a/drivers/serial/serial_bcm6858.c
+++ /dev/null
@@ -1,300 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
- *
- * Derived from linux/drivers/tty/serial/bcm63xx_uart.c:
- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Derived from linux/drivers/tty/serial/serial_bcm6345.c
- * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
- */
-
-#include <clk.h>
-#include <dm.h>
-#include <debug_uart.h>
-#include <errno.h>
-#include <serial.h>
-#include <asm/io.h>
-#include <asm/types.h>
-
-/* UART Control register */
-#define UART_CTL_REG 0x0
-#define UART_CTL_RXTIMEOUT_MASK 0x1f
-#define UART_CTL_RXTIMEOUT_5 0x5
-#define UART_CTL_RSTRXFIFO_SHIFT 6
-#define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT)
-#define UART_CTL_RSTTXFIFO_SHIFT 7
-#define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT)
-#define UART_CTL_STOPBITS_SHIFT 8
-#define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT)
-#define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT)
-#define UART_CTL_BITSPERSYM_SHIFT 12
-#define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT)
-#define UART_CTL_BITSPERSYM_8 (0x3 << UART_CTL_BITSPERSYM_SHIFT)
-#define UART_CTL_XMITBRK_SHIFT 14
-#define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT)
-#define UART_CTL_RSVD_SHIFT 15
-#define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT)
-#define UART_CTL_RXPAREVEN_SHIFT 16
-#define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT)
-#define UART_CTL_RXPAREN_SHIFT 17
-#define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT)
-#define UART_CTL_TXPAREVEN_SHIFT 18
-#define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT)
-#define UART_CTL_TXPAREN_SHIFT 19
-#define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT)
-#define UART_CTL_LOOPBACK_SHIFT 20
-#define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT)
-#define UART_CTL_RXEN_SHIFT 21
-#define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT)
-#define UART_CTL_TXEN_SHIFT 22
-#define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT)
-#define UART_CTL_BRGEN_SHIFT 23
-#define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT)
-
-/* UART Baudword register */
-#define UART_BAUD_REG 0x4
-
-/* UART FIFO Config register */
-#define UART_FIFO_CFG_REG 0x8
-#define UART_FIFO_CFG_RX_SHIFT 8
-#define UART_FIFO_CFG_RX_MASK (0xf << UART_FIFO_CFG_RX_SHIFT)
-#define UART_FIFO_CFG_RX_4 (0x4 << UART_FIFO_CFG_RX_SHIFT)
-#define UART_FIFO_CFG_TX_SHIFT 12
-#define UART_FIFO_CFG_TX_MASK (0xf << UART_FIFO_CFG_TX_SHIFT)
-#define UART_FIFO_CFG_TX_4 (0x4 << UART_FIFO_CFG_TX_SHIFT)
-
-/* UART Interrupt register */
-#define UART_IR_REG 0x10
-#define UART_IR_STAT(x) (1 << (x))
-#define UART_IR_TXEMPTY 5
-#define UART_IR_RXOVER 7
-#define UART_IR_RXNOTEMPTY 11
-
-/* UART FIFO register */
-#define UART_FIFO_REG 0x14
-#define UART_FIFO_VALID_MASK 0xff
-#define UART_FIFO_FRAMEERR_SHIFT 8
-#define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT)
-#define UART_FIFO_PARERR_SHIFT 9
-#define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT)
-#define UART_FIFO_BRKDET_SHIFT 10
-#define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT)
-#define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \
- UART_FIFO_PARERR_MASK | \
- UART_FIFO_BRKDET_MASK)
-
-struct bcm6858_serial_priv {
- void __iomem *base;
- ulong uartclk;
-};
-
-/* enable rx & tx operation on uart */
-static void bcm6858_serial_enable(void __iomem *base)
-{
- setbits_le32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
-}
-
-/* disable rx & tx operation on uart */
-static void bcm6858_serial_disable(void __iomem *base)
-{
- clrbits_le32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
- UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
-}
-
-/* clear all unread data in rx fifo and unsent data in tx fifo */
-static void bcm6858_serial_flush(void __iomem *base)
-{
- /* empty rx and tx fifo */
- setbits_le32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
- UART_CTL_RSTTXFIFO_MASK);
-
- /* read any pending char to make sure all irq status are cleared */
- readl(base + UART_FIFO_REG);
-}
-
-static int bcm6858_serial_init(void __iomem *base, ulong clk, u32 baudrate)
-{
- u32 val;
-
- /* mask all irq and flush port */
- bcm6858_serial_disable(base);
- bcm6858_serial_flush(base);
-
- /* set uart control config */
- clrsetbits_le32(base + UART_CTL_REG,
- /* clear rx timeout */
- UART_CTL_RXTIMEOUT_MASK |
- /* clear stop bits */
- UART_CTL_STOPBITS_MASK |
- /* clear bits per symbol */
- UART_CTL_BITSPERSYM_MASK |
- /* clear xmit break */
- UART_CTL_XMITBRK_MASK |
- /* clear reserved bit */
- UART_CTL_RSVD_MASK |
- /* disable parity */
- UART_CTL_RXPAREN_MASK |
- UART_CTL_TXPAREN_MASK |
- /* disable loopback */
- UART_CTL_LOOPBACK_MASK,
- /* set timeout to 5 */
- UART_CTL_RXTIMEOUT_5 |
- /* set 8 bits/symbol */
- UART_CTL_BITSPERSYM_8 |
- /* set 1 stop bit */
- UART_CTL_STOPBITS_1 |
- /* set parity to even */
- UART_CTL_RXPAREVEN_MASK |
- UART_CTL_TXPAREVEN_MASK);
-
- /* set uart fifo config */
- clrsetbits_le32(base + UART_FIFO_CFG_REG,
- /* clear fifo config */
- UART_FIFO_CFG_RX_MASK |
- UART_FIFO_CFG_TX_MASK,
- /* set fifo config to 4 */
- UART_FIFO_CFG_RX_4 |
- UART_FIFO_CFG_TX_4);
-
- /* set baud rate */
- val = ((clk / baudrate) >> 4);
- if (val & 0x1)
- val = (val >> 1);
- else
- val = (val >> 1) - 1;
- writel(val, base + UART_BAUD_REG);
-
- /* clear interrupts */
- writel(0, base + UART_IR_REG);
-
- /* enable uart */
- bcm6858_serial_enable(base);
-
- return 0;
-}
-
-static int bcm6858_serial_pending(struct udevice *dev, bool input)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- u32 val = readl(priv->base + UART_IR_REG);
-
- if (input)
- return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));
- else
- return !(val & UART_IR_STAT(UART_IR_TXEMPTY));
-}
-
-static int bcm6858_serial_setbrg(struct udevice *dev, int baudrate)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
-
- return bcm6858_serial_init(priv->base, priv->uartclk, baudrate);
-}
-
-static int bcm6858_serial_putc(struct udevice *dev, const char ch)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- u32 val;
-
- val = readl(priv->base + UART_IR_REG);
- if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
- return -EAGAIN;
-
- writel(ch, priv->base + UART_FIFO_REG);
-
- return 0;
-}
-
-static int bcm6858_serial_getc(struct udevice *dev)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- u32 val;
-
- val = readl(priv->base + UART_IR_REG);
- if (val & UART_IR_STAT(UART_IR_RXOVER))
- setbits_le32(priv->base + UART_CTL_REG,
- UART_CTL_RSTRXFIFO_MASK);
-
- if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
- return -EAGAIN;
-
- val = readl(priv->base + UART_FIFO_REG);
- if (val & UART_FIFO_ANYERR_MASK)
- return -EAGAIN;
-
- return val & UART_FIFO_VALID_MASK;
-}
-
-static int bcm6858_serial_probe(struct udevice *dev)
-{
- struct bcm6858_serial_priv *priv = dev_get_priv(dev);
- struct clk clk;
- int ret;
-
- /* get address */
- priv->base = dev_remap_addr(dev);
- if (!priv->base)
- return -EINVAL;
-
- /* get clock rate */
- ret = clk_get_by_index(dev, 0, &clk);
- if (ret < 0)
- return ret;
- priv->uartclk = clk_get_rate(&clk);
- clk_free(&clk);
-
- /* initialize serial */
- return bcm6858_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE);
-}
-
-static const struct dm_serial_ops bcm6858_serial_ops = {
- .putc = bcm6858_serial_putc,
- .pending = bcm6858_serial_pending,
- .getc = bcm6858_serial_getc,
- .setbrg = bcm6858_serial_setbrg,
-};
-
-static const struct udevice_id bcm6858_serial_ids[] = {
- { .compatible = "brcm,bcm6858-uart" },
- { /* sentinel */ }
-};
-
-U_BOOT_DRIVER(bcm6858_serial) = {
- .name = "bcm6858-uart",
- .id = UCLASS_SERIAL,
- .of_match = bcm6858_serial_ids,
- .probe = bcm6858_serial_probe,
- .priv_auto_alloc_size = sizeof(struct bcm6858_serial_priv),
- .ops = &bcm6858_serial_ops,
- .flags = DM_FLAG_PRE_RELOC,
-};
-
-#ifdef CONFIG_DEBUG_UART_BCM6858
-static inline void _debug_uart_init(void)
-{
- void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
-
- bcm6858_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
-}
-
-static inline void wait_xfered(void __iomem *base)
-{
- do {
- u32 val = readl(base + UART_IR_REG);
- if (val & UART_IR_STAT(UART_IR_TXEMPTY))
- break;
- } while (1);
-}
-
-static inline void _debug_uart_putc(int ch)
-{
- void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
-
- wait_xfered(base);
- writel(ch, base + UART_FIFO_REG);
- wait_xfered(base);
-}
-
-DEBUG_UART_FUNCS
-#endif
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread