From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lukasz Majewski Date: Tue, 4 Dec 2018 12:00:44 +0100 Subject: [U-Boot] [PATCH v1 4/4] ARM: vf610: ddrmc: do not write CR79 by default In-Reply-To: <20181204101021.22817-5-stefan@agner.ch> References: <20181204101021.22817-1-stefan@agner.ch> <20181204101021.22817-5-stefan@agner.ch> Message-ID: <20181204120044.34757608@jawa> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stefan, > From: Stefan Agner > > The current value CTLUPD_AREF(0) is the reset value of the register, > so there is no need to write a value. If needed, the register can be > written using board specific CR settings. > > Signed-off-by: Stefan Agner > Acked-by: Marcel Ziswiler > --- > > arch/arm/mach-imx/ddrmc-vf610.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm/mach-imx/ddrmc-vf610.c > b/arch/arm/mach-imx/ddrmc-vf610.c index d121a53898..d4926b5cee 100644 > --- a/arch/arm/mach-imx/ddrmc-vf610.c > +++ b/arch/arm/mach-imx/ddrmc-vf610.c > @@ -188,7 +188,6 @@ void ddrmc_ctrl_init_ddr3(struct > ddr3_jedec_timings const *timings, DDRMC_CR77_SWAP_EN, > &ddrmr->cr[77]); writel(DDRMC_CR78_Q_FULLNESS(timings->q_fullness) | > DDRMC_CR78_BUR_ON_FLY_BIT(12), &ddrmr->cr[78]); > - writel(DDRMC_CR79_CTLUPD_AREF(0), &ddrmr->cr[79]); > > writel(DDRMC_CR82_INT_MASK, &ddrmr->cr[82]); > Reviewed-by: Lukasz Majewski Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 488 bytes Desc: OpenPGP digital signature URL: