From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Fri, 7 Dec 2018 15:34:13 -0500 Subject: [U-Boot] [U-Boot, 2/5] gpio: stm32f7: Add gpio bank holes management In-Reply-To: <1543830774-19999-3-git-send-email-patrice.chotard@st.com> References: <1543830774-19999-3-git-send-email-patrice.chotard@st.com> Message-ID: <20181207203413.GQ14374@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, Dec 03, 2018 at 10:52:51AM +0100, Patrice Chotard wrote: > In some STM32 SoC packages, GPIO bank has not always 16 gpios. > Several cases can occur, gpio hole can be located at the beginning, > middle or end of the gpio bank or a combination of these 3 > configurations. > > For that, gpio bindings offer the gpio-ranges DT property which > described the gpio bank mapping. > > Signed-off-by: Patrice Chotard Applied to u-boot/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: