From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 7/7] MIPS: bootm: Add support for compatibility with redboot
Date: Fri, 14 Dec 2018 16:16:51 +0100 [thread overview]
Message-ID: <20181214151651.2974-8-gregory.clement@bootlin.com> (raw)
In-Reply-To: <20181214151651.2974-1-gregory.clement@bootlin.com>
The kernels built to be launch by redboot (such as the Vcore III) have
different expectation in the way the data were passed.
Unlike with yamon, the command line is expected to be a single string
passed in argv[1]. An other expectation is that the arguments are located
in the cached address space.
However, like yamon, they expect that rd_start and rd_size was passed by
the bootloader in the command line of the kernel.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/mips/Kconfig | 4 +++
arch/mips/lib/bootm.c | 76 +++++++++++++++++++++++++++++++------------
2 files changed, 60 insertions(+), 20 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index bfe9c11069..eae5cb0f99 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -63,6 +63,7 @@ config ARCH_MSCC
bool "Support MSCC VCore-III"
select OF_CONTROL
select DM
+ select MIPS_BOOT_CMDLINE_SINGLESTRING
config ARCH_BMIPS
bool "Support BMIPS SoCs"
@@ -466,6 +467,9 @@ config MIPS_BOOT_CONFIG_WORD1
help
Value which is inserted as boot config word 1.
+config MIPS_BOOT_CMDLINE_SINGLESTRING
+ bool
+
endif
endmenu
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index deca5189e3..38243cfa92 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -15,6 +15,11 @@ DECLARE_GLOBAL_DATA_PTR;
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
+enum legacy_boot_type {
+ LEGACY_BOOT_YAML,
+ LEGACY_BOOT_CMDLINE_SINGLESTRING,
+};
+
static int linux_argc;
static char **linux_argv;
static char *linux_argp;
@@ -44,22 +49,47 @@ void arch_lmb_reserve(struct lmb *lmb)
lmb_reserve(lmb, sp, gd->ram_top - sp);
}
-static void linux_cmdline_init(void)
+static void linux_cmdline_init(enum legacy_boot_type boot_type)
{
+ switch (boot_type) {
+ /*
+ * Vcore III linux kernels expect arguments in the cached
+ * address space. They also expect the command line being a
+ * single string in the first argument
+ */
+ case LEGACY_BOOT_CMDLINE_SINGLESTRING:
+ linux_argv = (char **)(gd->bd->bi_boot_params);
+ linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
+ linux_argv[1] = linux_argp;
+ break;
+ case LEGACY_BOOT_YAML:
+ /* fall-through */
+ default:
+ linux_argv = (char **)UNCACHED_SDRAM(gd->bd->bi_boot_params);
+ linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
+ }
linux_argc = 1;
- linux_argv = (char **)UNCACHED_SDRAM(gd->bd->bi_boot_params);
linux_argv[0] = 0;
- linux_argp = (char *)(linux_argv + LINUX_MAX_ARGS);
}
-static void linux_cmdline_set(const char *value, size_t len)
+static void linux_cmdline_set(const char *value, size_t len,
+ enum legacy_boot_type boot_type)
{
- linux_argv[linux_argc] = linux_argp;
memcpy(linux_argp, value, len);
- linux_argp[len] = 0;
-
+ switch (boot_type) {
+ case LEGACY_BOOT_CMDLINE_SINGLESTRING:
+ linux_argv[linux_argc] = linux_argp;
+ linux_argp[len] = 0;
+ linux_argc++;
+ break;
+ case LEGACY_BOOT_YAML:
+ /* fall-through */
+ default:
+ linux_argp[len] = ' ';
+ linux_argp[len + 1] = 0;
+ linux_argc = 2;
+ }
linux_argp += len + 1;
- linux_argc++;
}
static void linux_cmdline_dump(void)
@@ -73,12 +103,11 @@ static void linux_cmdline_dump(void)
debug(" arg %03d: %s\n", i, linux_argv[i]);
}
-static void linux_cmdline_legacy(bootm_headers_t *images)
+static void linux_cmdline_legacy(bootm_headers_t *images,
+ enum legacy_boot_type boot_type)
{
const char *bootargs, *next, *quote;
-
- linux_cmdline_init();
-
+ linux_cmdline_init(boot_type);
bootargs = env_get("bootargs");
if (!bootargs)
return;
@@ -104,7 +133,7 @@ static void linux_cmdline_legacy(bootm_headers_t *images)
if (!next)
next = bootargs + strlen(bootargs);
- linux_cmdline_set(bootargs, next - bootargs);
+ linux_cmdline_set(bootargs, next - bootargs, boot_type);
if (*next)
next++;
@@ -113,7 +142,8 @@ static void linux_cmdline_legacy(bootm_headers_t *images)
}
}
-static void linux_cmdline_append(bootm_headers_t *images)
+static void linux_cmdline_append(bootm_headers_t *images,
+ enum legacy_boot_type boot_type)
{
char buf[24];
ulong mem, rd_start, rd_size;
@@ -121,7 +151,7 @@ static void linux_cmdline_append(bootm_headers_t *images)
/* append mem */
mem = gd->ram_size >> 20;
sprintf(buf, "mem=%luM", mem);
- linux_cmdline_set(buf, strlen(buf));
+ linux_cmdline_set(buf, strlen(buf), boot_type);
/* append rd_start and rd_size */
rd_start = images->initrd_start;
@@ -129,9 +159,9 @@ static void linux_cmdline_append(bootm_headers_t *images)
if (rd_size) {
sprintf(buf, "rd_start=0x%08lX", rd_start);
- linux_cmdline_set(buf, strlen(buf));
+ linux_cmdline_set(buf, strlen(buf), boot_type);
sprintf(buf, "rd_size=0x%lX", rd_size);
- linux_cmdline_set(buf, strlen(buf));
+ linux_cmdline_set(buf, strlen(buf), boot_type);
}
}
@@ -276,11 +306,17 @@ static void boot_prep_linux(bootm_headers_t *images)
boot_reloc_fdt(images);
boot_setup_fdt(images);
} else {
- if (CONFIG_IS_ENABLED(MIPS_BOOT_CMDLINE_LEGACY)) {
- linux_cmdline_legacy(images);
+ if (CONFIG_IS_ENABLED(MIPS_BOOT_CMDLINE_SINGLESTRING)) {
+ linux_cmdline_legacy(images,
+ LEGACY_BOOT_CMDLINE_SINGLESTRING);
+ linux_cmdline_append(images,
+ LEGACY_BOOT_CMDLINE_SINGLESTRING);
+ linux_cmdline_dump();
+ } else if (CONFIG_IS_ENABLED(MIPS_BOOT_CMDLINE_LEGACY)) {
+ linux_cmdline_legacy(images, 0);
if (!CONFIG_IS_ENABLED(MIPS_BOOT_ENV_LEGACY))
- linux_cmdline_append(images);
+ linux_cmdline_append(images, LEGACY_BOOT_YAML);
linux_cmdline_dump();
}
--
2.19.2
next prev parent reply other threads:[~2018-12-14 15:16 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-14 15:16 [U-Boot] [PATCH v4 0/7] Add support for the SoCs found in Microsemi switches Gregory CLEMENT
2018-12-14 15:16 ` [U-Boot] [PATCH v4 1/7] MIPS: move create_tlb() in an proper header: mipsregs.h Gregory CLEMENT
2018-12-14 15:16 ` [U-Boot] [PATCH v4 2/7] MIPS: Allow to prefetch and lock instructions into cache Gregory CLEMENT
2018-12-14 15:16 ` [U-Boot] [PATCH v4 3/7] MSCC: add support for Ocelot SoCs Gregory CLEMENT
2018-12-14 15:16 ` [U-Boot] [PATCH v4 4/7] MSCC: add support for Luton SoCs Gregory CLEMENT
2018-12-14 15:16 ` [U-Boot] [PATCH v4 5/7] MSCC: add board support for the Ocelots based evaluation boards Gregory CLEMENT
2018-12-14 15:16 ` [U-Boot] [PATCH v4 6/7] MSCC: add board support for the Luton based evaluation board Gregory CLEMENT
2018-12-15 17:13 ` Daniel Schwierzeck
2018-12-16 9:26 ` Gregory CLEMENT
2018-12-17 9:55 ` Gregory CLEMENT
2018-12-17 12:50 ` Daniel Schwierzeck
2018-12-17 14:50 ` Gregory CLEMENT
2018-12-14 15:16 ` Gregory CLEMENT [this message]
2018-12-17 23:43 ` [U-Boot] [PATCH v4 0/7] Add support for the SoCs found in Microsemi switches Daniel Schwierzeck
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