From: Priit Laes <plaes@plaes.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/3] sunxi: display: Move DDC PLL setup to HDMI init
Date: Wed, 19 Dec 2018 15:06:08 +0200 [thread overview]
Message-ID: <20181219130609.12358-2-plaes@plaes.org> (raw)
In-Reply-To: <20181219130609.12358-1-plaes@plaes.org>
From: Priit Laes <priit.laes@paf.com>
Move PLL initialization code to single place so
we won't call it every time we query for EDID data.
Signed-off-by: Priit Laes <priit.laes@paf.com>
---
drivers/video/sunxi/sunxi_display.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index 6dd9bec351..0362071f72 100644
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -113,6 +113,13 @@ static int sunxi_hdmi_hpd_detect(int hpd_delay)
writel(SUNXI_HDMI_CTRL_ENABLE, &hdmi->ctrl);
writel(SUNXI_HDMI_PAD_CTRL0_HDP, &hdmi->pad_ctrl0);
+ /* Enable PLLs for eventual DDC */
+ writel(SUNXI_HDMI_PAD_CTRL1 | SUNXI_HDMI_PAD_CTRL1_HALVE,
+ &hdmi->pad_ctrl1);
+ writel(SUNXI_HDMI_PLL_CTRL | SUNXI_HDMI_PLL_CTRL_DIV(15),
+ &hdmi->pll_ctrl);
+ writel(SUNXI_HDMI_PLL_DBG0_PLL3, &hdmi->pll_dbg0);
+
while (timer_get_us() < tmo) {
if (readl(&hdmi->hpd) & SUNXI_HDMI_HPD_DETECT)
return 1;
@@ -215,13 +222,6 @@ static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
int i, r, ext_blocks = 0;
- /* SUNXI_HDMI_CTRL_ENABLE & PAD_CTRL0 are already set by hpd_detect */
- writel(SUNXI_HDMI_PAD_CTRL1 | SUNXI_HDMI_PAD_CTRL1_HALVE,
- &hdmi->pad_ctrl1);
- writel(SUNXI_HDMI_PLL_CTRL | SUNXI_HDMI_PLL_CTRL_DIV(15),
- &hdmi->pll_ctrl);
- writel(SUNXI_HDMI_PLL_DBG0_PLL3, &hdmi->pll_dbg0);
-
/* Reset i2c controller */
setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_DDC_GATE);
writel(SUNXI_HMDI_DDC_CTRL_ENABLE |
--
2.11.0
next prev parent reply other threads:[~2018-12-19 13:06 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-19 13:06 [U-Boot] [PATCH 1/3] videomodes: Allow EDID timings where hsync/vsync pulse is 0 Priit Laes
2018-12-19 13:06 ` Priit Laes [this message]
2019-02-15 15:58 ` [U-Boot] [PATCH 2/3] sunxi: display: Move DDC PLL setup to HDMI init Anatolij Gustschin
2018-12-19 13:06 ` [U-Boot] [PATCH 3/3] sunxi: display: Implement fallback to ddc probe when hpd fails Priit Laes
2019-02-15 15:59 ` Anatolij Gustschin
2019-02-14 17:12 ` [U-Boot] [PATCH 1/3] videomodes: Allow EDID timings where hsync/vsync pulse is 0 Jagan Teki
2019-02-14 21:34 ` Priit Laes
2019-02-15 15:34 ` Anatolij Gustschin
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