[U-Boot] [PATCH v6 12/20] clk: sunxi: Implement UART resets

[Jagan Teki <jagan@amarulasolutions.com>]

Implement UART resets for all relevant Allwinner SoC
clock drivers via ccu reset table.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/clk/sunxi/clk_a23.c  | 6 ++++++
 drivers/clk/sunxi/clk_a31.c  | 7 +++++++
 drivers/clk/sunxi/clk_a64.c  | 6 ++++++
 drivers/clk/sunxi/clk_a83t.c | 6 ++++++
 drivers/clk/sunxi/clk_h3.c   | 5 +++++
 drivers/clk/sunxi/clk_r40.c  | 9 +++++++++
 drivers/clk/sunxi/clk_v3s.c  | 4 ++++
 7 files changed, 43 insertions(+)

diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index ebe8d0002c..854259bf81 100644
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -38,6 +38,12 @@ static struct ccu_reset a23_resets[] = {
 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
 	[RST_BUS_EHCI]		= RESET(0x2c0, BIT(26)),
 	[RST_BUS_OHCI]		= RESET(0x2c0, BIT(29)),
+
+	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
+	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
+	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
+	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
+	[RST_BUS_UART4]		= RESET(0x2d8, BIT(20)),
 };
 
 static const struct ccu_desc a23_ccu_desc = {
diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index 145df5c19f..a38d76cb7c 100644
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -46,6 +46,13 @@ static struct ccu_reset a31_resets[] = {
 	[RST_AHB1_OHCI0]	= RESET(0x2c0, BIT(29)),
 	[RST_AHB1_OHCI1]	= RESET(0x2c0, BIT(30)),
 	[RST_AHB1_OHCI2]	= RESET(0x2c0, BIT(31)),
+
+	[RST_APB2_UART0]	= RESET(0x2d8, BIT(16)),
+	[RST_APB2_UART1]	= RESET(0x2d8, BIT(17)),
+	[RST_APB2_UART2]	= RESET(0x2d8, BIT(18)),
+	[RST_APB2_UART3]	= RESET(0x2d8, BIT(19)),
+	[RST_APB2_UART4]	= RESET(0x2d8, BIT(20)),
+	[RST_APB2_UART5]	= RESET(0x2d8, BIT(21)),
 };
 
 static const struct ccu_desc a31_ccu_desc = {
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index 63424a9e2d..a2ba6eefc5 100644
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -43,6 +43,12 @@ static const struct ccu_reset a64_resets[] = {
 	[RST_BUS_EHCI1]         = RESET(0x2c0, BIT(25)),
 	[RST_BUS_OHCI0]         = RESET(0x2c0, BIT(28)),
 	[RST_BUS_OHCI1]         = RESET(0x2c0, BIT(29)),
+
+	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
+	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
+	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
+	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
+	[RST_BUS_UART4]		= RESET(0x2d8, BIT(20)),
 };
 
 static const struct ccu_desc a64_ccu_desc = {
diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 76099fd154..1ef6ac5b25 100644
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -40,6 +40,12 @@ static struct ccu_reset a83t_resets[] = {
 	[RST_BUS_EHCI0]		= RESET(0x2c0, BIT(26)),
 	[RST_BUS_EHCI1]		= RESET(0x2c0, BIT(27)),
 	[RST_BUS_OHCI0]		= RESET(0x2c0, BIT(29)),
+
+	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
+	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
+	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
+	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
+	[RST_BUS_UART4]		= RESET(0x2d8, BIT(20)),
 };
 
 static const struct ccu_desc a83t_ccu_desc = {
diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index 69c2aa34a3..f82949b3b6 100644
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -53,6 +53,11 @@ static struct ccu_reset h3_resets[] = {
 	[RST_BUS_OHCI1]		= RESET(0x2c0, BIT(29)),
 	[RST_BUS_OHCI2]		= RESET(0x2c0, BIT(30)),
 	[RST_BUS_OHCI3]		= RESET(0x2c0, BIT(31)),
+
+	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
+	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
+	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
+	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
 };
 
 static const struct ccu_desc h3_ccu_desc = {
diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index 9a632b2603..fd7aae97ea 100644
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -50,6 +50,15 @@ static struct ccu_reset r40_resets[] = {
 	[RST_BUS_OHCI0]		= RESET(0x2c0, BIT(29)),
 	[RST_BUS_OHCI1]		= RESET(0x2c0, BIT(30)),
 	[RST_BUS_OHCI2]		= RESET(0x2c0, BIT(31)),
+
+	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
+	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
+	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
+	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
+	[RST_BUS_UART4]		= RESET(0x2d8, BIT(20)),
+	[RST_BUS_UART5]		= RESET(0x2d8, BIT(21)),
+	[RST_BUS_UART6]		= RESET(0x2d8, BIT(22)),
+	[RST_BUS_UART7]		= RESET(0x2d8, BIT(23)),
 };
 
 static const struct ccu_desc r40_ccu_desc = {
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index a268786b2d..25ad87500e 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -26,6 +26,10 @@ static struct ccu_reset v3s_resets[] = {
 	[RST_USB_PHY0]		= RESET(0x0cc, BIT(0)),
 
 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
+
+	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
+	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
+	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
 };
 
 static const struct ccu_desc v3s_ccu_desc = {
-- 
2.18.0.321.gffc6fa0e3