public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: Anup Patel <anup@brainfault.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 11/11] riscv: Add SiFive FU540 board support
Date: Thu, 17 Jan 2019 16:33:56 +0530	[thread overview]
Message-ID: <20190117110356.36753-12-anup@brainfault.org> (raw)
In-Reply-To: <20190117110356.36753-1-anup@brainfault.org>

From: Anup Patel <anup.patel@wdc.com>

This patch adds SiFive FU540 board support. For now, only
SiFive serial, SiFive PRCI, and Cadance MACB drivers are
only enabled. The SiFive FU540 defconfig by default builds
U-Boot for S-Mode because U-Boot on SiFive FU540 will run
in S-Mode as payload of BBL or OpenSBI.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 arch/riscv/Kconfig             |  4 ++++
 board/sifive/fu540/Kconfig     | 42 +++++++++++++++++++++++++++++++++
 board/sifive/fu540/MAINTAINERS |  9 +++++++
 board/sifive/fu540/Makefile    |  5 ++++
 board/sifive/fu540/fu540.c     | 17 ++++++++++++++
 configs/sifive_fu540_defconfig | 11 +++++++++
 include/configs/sifive-fu540.h | 43 ++++++++++++++++++++++++++++++++++
 7 files changed, 131 insertions(+)
 create mode 100644 board/sifive/fu540/Kconfig
 create mode 100644 board/sifive/fu540/MAINTAINERS
 create mode 100644 board/sifive/fu540/Makefile
 create mode 100644 board/sifive/fu540/fu540.c
 create mode 100644 configs/sifive_fu540_defconfig
 create mode 100644 include/configs/sifive-fu540.h

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6879047ff7..36512a8995 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -14,11 +14,15 @@ config TARGET_AX25_AE350
 config TARGET_QEMU_VIRT
 	bool "Support QEMU Virt Board"
 
+config TARGET_SIFIVE_FU540
+	bool "Support SiFive FU540 Board"
+
 endchoice
 
 # board-specific options below
 source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
+source "board/sifive/fu540/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
new file mode 100644
index 0000000000..6be3d88144
--- /dev/null
+++ b/board/sifive/fu540/Kconfig
@@ -0,0 +1,42 @@
+if TARGET_SIFIVE_FU540
+
+config SYS_BOARD
+	default "fu540"
+
+config SYS_VENDOR
+	default "sifive"
+
+config SYS_CPU
+	default "generic"
+
+config SYS_CONFIG_NAME
+	default "sifive-fu540"
+
+config SYS_TEXT_BASE
+	default 0x80000000 if !RISCV_SMODE
+	default 0x80200000 if RISCV_SMODE
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select GENERIC_RISCV
+	imply CMD_DHCP
+	imply CMD_EXT2
+	imply CMD_EXT4
+	imply CMD_FAT
+	imply CMD_FS_GENERIC
+	imply CMD_NET
+	imply CMD_PING
+	imply CLK_SIFIVE
+	imply CLK_SIFIVE_FU540_PRCI
+	imply DOS_PARTITION
+	imply EFI_PARTITION
+	imply IP_DYN
+	imply ISO_PARTITION
+	imply MACB
+	imply MII
+	imply NET_RANDOM_ETHADDR
+	imply PHY_LIB
+	imply PHY_MSCC
+	imply SIFIVE_SERIAL
+
+endif
diff --git a/board/sifive/fu540/MAINTAINERS b/board/sifive/fu540/MAINTAINERS
new file mode 100644
index 0000000000..702d803ad8
--- /dev/null
+++ b/board/sifive/fu540/MAINTAINERS
@@ -0,0 +1,9 @@
+SiFive FU540 BOARD
+M:	Paul Walmsley <paul.walmsley@sifive.com>
+M:	Palmer Dabbelt <palmer@sifive.com>
+M:	Anup Patel <anup.patel@wdc.com>
+M:	Atish Patra <atish.patra@wdc.com>
+S:	Maintained
+F:	board/sifive/fu540/
+F:	include/configs/sifive-fu540.h
+F:	configs/sifive_fu540_defconfig
diff --git a/board/sifive/fu540/Makefile b/board/sifive/fu540/Makefile
new file mode 100644
index 0000000000..6e1862c475
--- /dev/null
+++ b/board/sifive/fu540/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+
+obj-y	+= fu540.o
diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
new file mode 100644
index 0000000000..5adc4a3d4a
--- /dev/null
+++ b/board/sifive/fu540/fu540.c
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+
+int board_init(void)
+{
+	/* For now nothing to do here. */
+
+	return 0;
+}
diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
new file mode 100644
index 0000000000..2f8cca9de0
--- /dev/null
+++ b/configs/sifive_fu540_defconfig
@@ -0,0 +1,11 @@
+CONFIG_RISCV=y
+CONFIG_TARGET_SIFIVE_FU540=y
+CONFIG_RISCV_SMODE=y
+CONFIG_ARCH_RV64I=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_FIT=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_CMD_MII=y
+CONFIG_OF_PRIOR_STAGE=y
diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h
new file mode 100644
index 0000000000..7007b5f6af
--- /dev/null
+++ b/include/configs/sifive-fu540.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
+
+#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_2M)
+
+#define CONFIG_SYS_MALLOC_LEN		SZ_8M
+
+#define CONFIG_SYS_BOOTM_LEN		SZ_16M
+
+#define CONFIG_STANDALONE_LOAD_ADDR	0x80200000
+
+/* Environment options */
+#define CONFIG_ENV_SIZE			SZ_4K
+
+#define BOOT_TARGET_DEVICES(func) \
+	func(DHCP, dhcp, na)
+
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"fdt_high=0xffffffffffffffff\0" \
+	"initrd_high=0xffffffffffffffff\0" \
+	"kernel_addr_r=0x80600000\0" \
+	"fdt_addr_r=0x82200000\0" \
+	"scriptaddr=0x82300000\0" \
+	"pxefile_addr_r=0x82400000\0" \
+	"ramdisk_addr_r=0x82500000\0" \
+	BOOTENV
+
+#endif /* __CONFIG_H */
-- 
2.17.1

  parent reply	other threads:[~2019-01-17 11:03 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-17 11:03 [U-Boot] [PATCH 00/11] SiFive FU540 Support Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 01/11] riscv: Rename cpu/qemu to cpu/generic Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 02/11] riscv: Add asm/dma-mapping.h for DMA mappings Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 03/11] riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 04/11] net: macb: Fix clk API usage for RISC-V systems Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 05/11] net: macb: Fix GEM hardware detection Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 06/11] clk: Add SiFive FU540 PRCI clock driver Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 07/11] clk: Add fixed-factor " Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 08/11] drivers: serial_sifive: Fix baud rate calculation Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 09/11] drivers: serial: serial_sifive: Skip baudrate config if no input clock Anup Patel
2019-01-17 11:03 ` [U-Boot] [PATCH 10/11] cpu: Bind timer driver for boot hart Anup Patel
2019-01-17 11:03 ` Anup Patel [this message]
2019-01-17 11:06 ` [U-Boot] [PATCH 00/11] SiFive FU540 Support Anup Patel
  -- strict thread matches above, loose matches on Subject: below --
2019-01-17 10:38 Anup Patel
2019-01-17 10:39 ` [U-Boot] [PATCH 11/11] riscv: Add SiFive FU540 board support Anup Patel
2019-01-17 16:55   ` Troy Benjegerdes
2019-01-17 18:20     ` Atish Patra
2019-01-17 23:05   ` Alexander Graf

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190117110356.36753-12-anup@brainfault.org \
    --to=anup@brainfault.org \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox