[U-Boot] [PATCH v3 1/9] sunxi: clk: add MMC gates/resets

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From: Jagan Teki <jagan@amarulasolutions.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 1/9] sunxi: clk: add MMC gates/resets
Date: Mon, 21 Jan 2019 16:01:07 +0530	[thread overview]
Message-ID: <20190121103115.17794-2-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20190121103115.17794-1-jagan@amarulasolutions.com>

From: Andre Przywara <andre.przywara@arm.com>

Add the MMC clock gates and reset bits for all the Allwinner SoCs.
This allows them to be used by the MMC driver.

We don't advertise the mod clock yet, as this is still handled by the
MMC driver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: add V3S gates/resets, fix CLK_AHB1_MMC3 bit]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/clk/sunxi/clk_a10.c  | 4 ++++
 drivers/clk/sunxi/clk_a10s.c | 3 +++
 drivers/clk/sunxi/clk_a23.c  | 6 ++++++
 drivers/clk/sunxi/clk_a31.c  | 8 ++++++++
 drivers/clk/sunxi/clk_a64.c  | 6 ++++++
 drivers/clk/sunxi/clk_a83t.c | 6 ++++++
 drivers/clk/sunxi/clk_h3.c   | 6 ++++++
 drivers/clk/sunxi/clk_h6.c   | 6 ++++++
 drivers/clk/sunxi/clk_r40.c  | 8 ++++++++
 drivers/clk/sunxi/clk_v3s.c  | 6 ++++++
 10 files changed, 59 insertions(+)

diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index b00f51af8b..2aa41efe17 100644
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -18,6 +18,10 @@ static struct ccu_clk_gate a10_gates[] = {
 	[CLK_AHB_OHCI0]		= GATE(0x060, BIT(2)),
 	[CLK_AHB_EHCI1]		= GATE(0x060, BIT(3)),
 	[CLK_AHB_OHCI1]		= GATE(0x060, BIT(4)),
+	[CLK_AHB_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_AHB_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_AHB_MMC2]		= GATE(0x060, BIT(10)),
+	[CLK_AHB_MMC3]		= GATE(0x060, BIT(11)),
 
 	[CLK_APB1_UART0]	= GATE(0x06c, BIT(16)),
 	[CLK_APB1_UART1]	= GATE(0x06c, BIT(17)),
diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index aa904ce067..87b74e52dc 100644
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -16,6 +16,9 @@ static struct ccu_clk_gate a10s_gates[] = {
 	[CLK_AHB_OTG]		= GATE(0x060, BIT(0)),
 	[CLK_AHB_EHCI]		= GATE(0x060, BIT(1)),
 	[CLK_AHB_OHCI]		= GATE(0x060, BIT(2)),
+	[CLK_AHB_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_AHB_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_AHB_MMC2]		= GATE(0x060, BIT(10)),
 
 	[CLK_APB1_UART0]	= GATE(0x06c, BIT(16)),
 	[CLK_APB1_UART1]	= GATE(0x06c, BIT(17)),
diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index 854259bf81..1ef2359286 100644
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
 
 static struct ccu_clk_gate a23_gates[] = {
+	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
 	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
 	[CLK_BUS_EHCI]		= GATE(0x060, BIT(26)),
 	[CLK_BUS_OHCI]		= GATE(0x060, BIT(29)),
@@ -35,6 +38,9 @@ static struct ccu_reset a23_resets[] = {
 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
 	[RST_USB_HSIC]		= RESET(0x0cc, BIT(2)),
 
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
+	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
+	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
 	[RST_BUS_EHCI]		= RESET(0x2c0, BIT(26)),
 	[RST_BUS_OHCI]		= RESET(0x2c0, BIT(29)),
diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index a38d76cb7c..fa81f9a710 100644
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -13,6 +13,10 @@
 #include <dt-bindings/reset/sun6i-a31-ccu.h>
 
 static struct ccu_clk_gate a31_gates[] = {
+	[CLK_AHB1_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_AHB1_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_AHB1_MMC2]		= GATE(0x060, BIT(10)),
+	[CLK_AHB1_MMC3]		= GATE(0x060, BIT(12)),
 	[CLK_AHB1_OTG]		= GATE(0x060, BIT(24)),
 	[CLK_AHB1_EHCI0]	= GATE(0x060, BIT(26)),
 	[CLK_AHB1_EHCI1]	= GATE(0x060, BIT(27)),
@@ -40,6 +44,10 @@ static struct ccu_reset a31_resets[] = {
 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
 	[RST_USB_PHY2]		= RESET(0x0cc, BIT(2)),
 
+	[RST_AHB1_MMC0]		= RESET(0x2c0, BIT(8)),
+	[RST_AHB1_MMC1]		= RESET(0x2c0, BIT(9)),
+	[RST_AHB1_MMC2]		= RESET(0x2c0, BIT(10)),
+	[RST_AHB1_MMC3]		= RESET(0x2c0, BIT(11)),
 	[RST_AHB1_OTG]		= RESET(0x2c0, BIT(24)),
 	[RST_AHB1_EHCI0]	= RESET(0x2c0, BIT(26)),
 	[RST_AHB1_EHCI1]	= RESET(0x2c0, BIT(27)),
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index a2ba6eefc5..910275fbce 100644
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
 
 static const struct ccu_clk_gate a64_gates[] = {
+	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
 	[CLK_BUS_OTG]		= GATE(0x060, BIT(23)),
 	[CLK_BUS_EHCI0]		= GATE(0x060, BIT(24)),
 	[CLK_BUS_EHCI1]		= GATE(0x060, BIT(25)),
@@ -38,6 +41,9 @@ static const struct ccu_reset a64_resets[] = {
 	[RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
 	[RST_USB_HSIC]          = RESET(0x0cc, BIT(2)),
 
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
+	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
+	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
 	[RST_BUS_OTG]           = RESET(0x2c0, BIT(23)),
 	[RST_BUS_EHCI0]         = RESET(0x2c0, BIT(24)),
 	[RST_BUS_EHCI1]         = RESET(0x2c0, BIT(25)),
diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 1ef6ac5b25..b5a555da36 100644
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
 
 static struct ccu_clk_gate a83t_gates[] = {
+	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
 	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
 	[CLK_BUS_EHCI0]		= GATE(0x060, BIT(26)),
 	[CLK_BUS_EHCI1]		= GATE(0x060, BIT(27)),
@@ -36,6 +39,9 @@ static struct ccu_reset a83t_resets[] = {
 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
 	[RST_USB_HSIC]		= RESET(0x0cc, BIT(2)),
 
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
+	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
+	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
 	[RST_BUS_EHCI0]		= RESET(0x2c0, BIT(26)),
 	[RST_BUS_EHCI1]		= RESET(0x2c0, BIT(27)),
diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index f82949b3b6..98af372ec5 100644
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-h3-ccu.h>
 
 static struct ccu_clk_gate h3_gates[] = {
+	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
 	[CLK_BUS_OTG]		= GATE(0x060, BIT(23)),
 	[CLK_BUS_EHCI0]		= GATE(0x060, BIT(24)),
 	[CLK_BUS_EHCI1]		= GATE(0x060, BIT(25)),
@@ -44,6 +47,9 @@ static struct ccu_reset h3_resets[] = {
 	[RST_USB_PHY2]		= RESET(0x0cc, BIT(2)),
 	[RST_USB_PHY3]		= RESET(0x0cc, BIT(3)),
 
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(9)),
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(10)),
 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(23)),
 	[RST_BUS_EHCI0]		= RESET(0x2c0, BIT(24)),
 	[RST_BUS_EHCI1]		= RESET(0x2c0, BIT(25)),
diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 0da3a40e3d..902612da91 100644
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun50i-h6-ccu.h>
 
 static struct ccu_clk_gate h6_gates[] = {
+	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
+	[CLK_BUS_MMC1]		= GATE(0x84c, BIT(1)),
+	[CLK_BUS_MMC2]		= GATE(0x84c, BIT(2)),
 	[CLK_BUS_UART0]		= GATE(0x90c, BIT(0)),
 	[CLK_BUS_UART1]		= GATE(0x90c, BIT(1)),
 	[CLK_BUS_UART2]		= GATE(0x90c, BIT(2)),
@@ -20,6 +23,9 @@ static struct ccu_clk_gate h6_gates[] = {
 };
 
 static struct ccu_reset h6_resets[] = {
+	[RST_BUS_MMC0]		= RESET(0x84c, BIT(16)),
+	[RST_BUS_MMC1]		= RESET(0x84c, BIT(17)),
+	[RST_BUS_MMC2]		= RESET(0x84c, BIT(18)),
 	[RST_BUS_UART0]		= RESET(0x90c, BIT(16)),
 	[RST_BUS_UART1]		= RESET(0x90c, BIT(17)),
 	[RST_BUS_UART2]		= RESET(0x90c, BIT(18)),
diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index fd7aae97ea..b9457e1971 100644
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -13,6 +13,10 @@
 #include <dt-bindings/reset/sun8i-r40-ccu.h>
 
 static struct ccu_clk_gate r40_gates[] = {
+	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
+	[CLK_BUS_MMC3]		= GATE(0x060, BIT(11)),
 	[CLK_BUS_OTG]		= GATE(0x060, BIT(25)),
 	[CLK_BUS_EHCI0]		= GATE(0x060, BIT(26)),
 	[CLK_BUS_EHCI1]		= GATE(0x060, BIT(27)),
@@ -43,6 +47,10 @@ static struct ccu_reset r40_resets[] = {
 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
 	[RST_USB_PHY2]		= RESET(0x0cc, BIT(2)),
 
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
+	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
+	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
+	[RST_BUS_MMC3]		= RESET(0x2c0, BIT(11)),
 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(25)),
 	[RST_BUS_EHCI0]		= RESET(0x2c0, BIT(26)),
 	[RST_BUS_EHCI1]		= RESET(0x2c0, BIT(27)),
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 25ad87500e..c8a9027889 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
 
 static struct ccu_clk_gate v3s_gates[] = {
+	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
+	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
+	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
 	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
 
 	[CLK_BUS_UART0]		= GATE(0x06c, BIT(16)),
@@ -25,6 +28,9 @@ static struct ccu_clk_gate v3s_gates[] = {
 static struct ccu_reset v3s_resets[] = {
 	[RST_USB_PHY0]		= RESET(0x0cc, BIT(0)),
 
+	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
+	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
+	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
 
 	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
-- 
2.18.0.321.gffc6fa0e3

next prev parent reply	other threads:[~2019-01-21 10:31 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-21 10:31 [U-Boot] [PATCH v3 0/9] mmc: sunxi: Enable DM_MMC Jagan Teki
2019-01-21 10:31 ` Jagan Teki [this message]
2019-01-23  1:08   ` [U-Boot] [PATCH v3 1/9] sunxi: clk: add MMC gates/resets André Przywara
2019-01-21 10:31 ` [U-Boot] [PATCH v3 2/9] sunxi: clk: A80: add MMC clock support Jagan Teki
2019-01-21 10:31 ` [U-Boot] [PATCH v3 3/9] mmc: sunxi: Add A83T emmc compatible Jagan Teki
2019-01-23  1:37   ` André Przywara
2019-01-21 10:31 ` [U-Boot] [PATCH v3 4/9] mmc: sunxi: Add mmc, emmc H5/A64 compatible Jagan Teki
2019-01-23  1:39   ` André Przywara
2019-01-21 10:31 ` [U-Boot] [PATCH v3 5/9] mmc: sunxi: Add DM_MMC support for H6 Jagan Teki
2019-01-23  1:41   ` André Przywara
2019-01-21 10:31 ` [U-Boot] [PATCH v3 6/9] mmc: sunxi: Add DM_MMC support for A80 Jagan Teki
2019-01-23  1:52   ` André Przywara
2019-01-21 10:31 ` [U-Boot] [PATCH v3 7/9] dm: mmc: sunxi: Add CLK and RESET support Jagan Teki
2019-01-22 23:36   ` André Przywara
2019-01-21 10:31 ` [U-Boot] [PATCH v3 8/9] arm: sunxi: Enable DM_MMC Jagan Teki
2019-01-23  1:54   ` André Przywara
2019-01-21 10:31 ` [U-Boot] [PATCH v3 9/9] arm: dts: sunxi: Enumerate MMC2 as MMC1 Jagan Teki
2019-01-21 10:42   ` Chen-Yu Tsai
2019-01-21 11:07     ` Jagan Teki
2019-01-21 17:31       ` Chen-Yu Tsai
2019-01-21 15:38   ` Vasily Khoruzhick
2019-01-21 15:46     ` Jagan Teki
2019-01-22  4:24       ` Vasily Khoruzhick
2019-01-22  4:45         ` Vasily Khoruzhick
2019-01-21 17:05     ` Chen-Yu Tsai
2019-01-22  2:25 ` [U-Boot] [PATCH v3 0/9] mmc: sunxi: Enable DM_MMC Chen-Yu Tsai
2019-01-25  8:27   ` Jagan Teki
2019-01-25  8:34     ` Chen-Yu Tsai
2019-01-25 10:41       ` Jagan Teki
2019-01-25 11:01         ` [U-Boot] [linux-sunxi] " Chen-Yu Tsai
2019-01-25 11:36           ` Andre Przywara
2019-01-25 11:41             ` Jagan Teki
2019-01-25 11:42             ` Chen-Yu Tsai
2019-01-25 11:51               ` Andre Przywara

find likely ancestor, descendant, or conflicting patches for this message:
( dfblob:b00f51af8 dfblob:2aa41efe1 dfblob:aa904ce06 dfblob:87b74e52d
dfblob:854259bf8 dfblob:1ef235928 dfblob:a38d76cb7 dfblob:fa81f9a71
dfblob:a2ba6eefc dfblob:910275fbc dfblob:1ef6ac5b2 dfblob:b5a555da3
dfblob:f82949b3b dfblob:98af372ec dfblob:0da3a40e3 dfblob:902612da9
dfblob:fd7aae97e dfblob:b9457e197 dfblob:25ad87500 dfblob:c8a902788 )
 OR (
bs:"[U-Boot] [PATCH v3 1/9] sunxi: clk: add MMC gates/resets" )
	(help)

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