* [U-Boot] dfu broken on rk3288 dwc2_otg【请注意，邮件由u-boot-bounces@lists.denx.de代发】
2019-01-21 17:55 [U-Boot] dfu broken on rk3288 dwc2_otg Jack Mitchell
@ 2019-01-22 1:19 ` Kever Yang
2019-01-22 22:39 ` [U-Boot] dfu broken on rk3288 dwc2_otg Lukasz Majewski
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Kever Yang @ 2019-01-22 1:19 UTC (permalink / raw)
To: u-boot
Hi Jack,
On 01/22/2019 01:55 AM, Jack Mitchell wrote:
> Hi,
>
> Has anyone successfully used DFU on an rk3288 or dwc2_otg based board?
> When trying to download a binary to the board over DFU it currently
> seems to timeout and the transfer fails. I have tested the
> firefly-rk3288 and also the Tinkerboard.
I'm not sure if anyone else has test the dfu on rk3288, we have only test
rockusb, so maybe some variable needs to adapt for rk3288.
Thanks.
- Kever
>
> I have successfully used the same setup on an am335x beaglebone black on
> the same U-Boot commit.
>
> U-Boot:
>
> U-Boot 2019.01-00189-g2acc24fc28 (Jan 21 2019 - 16:27:07 +0000)
>
> Model: Firefly-RK3288
> DRAM: 4 GiB
> MMC: dwmmc at ff0c0000: 1, dwmmc at ff0f0000: 0
> Loading Environment from MMC... *** Warning - bad CRC, using default
> environment
>
> In: serial
> Out: serial
> Err: serial
> Model: Firefly-RK3288
> Net:
> Warning: ethernet at ff290000 (eth0) using random MAC address -
> ba:90:f6:9f:c4:70
> eth0: ethernet at ff290000
> Hit any key to stop autoboot: 0
> => setenv dfu_alt_info "kernel ram ${kernel_addr_r} 0x4000000"
> => dfu 0 ram 0
>
> Desktop:
>
> [jack at arch-corsair rk3288]$ dfu-util -l
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> Found DFU: [2207:320a] ver=9999, devnum=84, cfg=1, intf=0, path="5-4.1",
> alt=0, name="kernel", serial="UNKNOWN"
>
> [jack at arch-corsair rk3288]$ dfu-util -D test.img -a 0
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> dfu-util: Invalid DFU suffix signature
> dfu-util: A valid DFU suffix will be required in a future dfu-util
> release!!!
> Opening DFU capable USB device...
> ID 2207:320a
> Run-time device DFU version 0110
> Claiming USB DFU Interface...
> Setting Alternate Setting #0 ...
> Determining device status: state = dfuIDLE, status = 0
> dfuIDLE, continuing
> DFU mode device DFU version 0110
> Device returned transfer size 4096
> Copying data from PC to DFU device
> Download [ ] 0% 0 bytes
> dfu-util: Error during download get_status
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
^ permalink raw reply [flat|nested] 5+ messages in thread* [U-Boot] dfu broken on rk3288 dwc2_otg
2019-01-21 17:55 [U-Boot] dfu broken on rk3288 dwc2_otg Jack Mitchell
2019-01-22 1:19 ` [U-Boot] dfu broken on rk3288 dwc2_otg【请注意，邮件由u-boot-bounces@lists.denx.de代发】 Kever Yang
@ 2019-01-22 22:39 ` Lukasz Majewski
2019-01-24 11:34 ` Jack Mitchell
2019-01-24 11:37 ` Jack Mitchell
3 siblings, 0 replies; 5+ messages in thread
From: Lukasz Majewski @ 2019-01-22 22:39 UTC (permalink / raw)
To: u-boot
On Mon, 21 Jan 2019 17:55:51 +0000
Jack Mitchell <ml@embed.me.uk> wrote:
> Hi,
>
> Has anyone successfully used DFU on an rk3288 or dwc2_otg based board?
> When trying to download a binary to the board over DFU it currently
> seems to timeout and the transfer fails. I have tested the
> firefly-rk3288 and also the Tinkerboard.
I see from the output that you are using dwmmc. You may want to look
into trats/trats2/Odroid XU3 board from Samsung, as they use the same
IP block (and shall work).
>
> I have successfully used the same setup on an am335x beaglebone black
> on the same U-Boot commit.
>
> U-Boot:
>
> U-Boot 2019.01-00189-g2acc24fc28 (Jan 21 2019 - 16:27:07 +0000)
>
> Model: Firefly-RK3288
> DRAM: 4 GiB
> MMC: dwmmc at ff0c0000: 1, dwmmc at ff0f0000: 0
> Loading Environment from MMC... *** Warning - bad CRC, using default
> environment
>
> In: serial
> Out: serial
> Err: serial
> Model: Firefly-RK3288
> Net:
> Warning: ethernet at ff290000 (eth0) using random MAC address -
> ba:90:f6:9f:c4:70
> eth0: ethernet at ff290000
> Hit any key to stop autoboot: 0
> => setenv dfu_alt_info "kernel ram ${kernel_addr_r} 0x4000000"
> => dfu 0 ram 0
>
> Desktop:
>
> [jack at arch-corsair rk3288]$ dfu-util -l
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> Found DFU: [2207:320a] ver=9999, devnum=84, cfg=1, intf=0,
> path="5-4.1", alt=0, name="kernel", serial="UNKNOWN"
>
> [jack at arch-corsair rk3288]$ dfu-util -D test.img -a 0
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> dfu-util: Invalid DFU suffix signature
> dfu-util: A valid DFU suffix will be required in a future dfu-util
> release!!!
> Opening DFU capable USB device...
> ID 2207:320a
> Run-time device DFU version 0110
> Claiming USB DFU Interface...
> Setting Alternate Setting #0 ...
> Determining device status: state = dfuIDLE, status = 0
> dfuIDLE, continuing
> DFU mode device DFU version 0110
> Device returned transfer size 4096
> Copying data from PC to DFU device
> Download [ ] 0% 0 bytes
> dfu-util: Error during download get_status
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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^ permalink raw reply [flat|nested] 5+ messages in thread* [U-Boot] dfu broken on rk3288 dwc2_otg
2019-01-21 17:55 [U-Boot] dfu broken on rk3288 dwc2_otg Jack Mitchell
2019-01-22 1:19 ` [U-Boot] dfu broken on rk3288 dwc2_otg【请注意，邮件由u-boot-bounces@lists.denx.de代发】 Kever Yang
2019-01-22 22:39 ` [U-Boot] dfu broken on rk3288 dwc2_otg Lukasz Majewski
@ 2019-01-24 11:34 ` Jack Mitchell
2019-01-24 11:37 ` Jack Mitchell
3 siblings, 0 replies; 5+ messages in thread
From: Jack Mitchell @ 2019-01-24 11:34 UTC (permalink / raw)
To: u-boot
On 21/01/2019 17:55, Jack Mitchell wrote:
> Hi,
>
> Has anyone successfully used DFU on an rk3288 or dwc2_otg based board?
> When trying to download a binary to the board over DFU it currently
> seems to timeout and the transfer fails. I have tested the
> firefly-rk3288 and also the Tinkerboard.
>
> I have successfully used the same setup on an am335x beaglebone black on
> the same U-Boot commit.
>
> U-Boot:
>
> U-Boot 2019.01-00189-g2acc24fc28 (Jan 21 2019 - 16:27:07 +0000)
>
> Model: Firefly-RK3288
> DRAM: 4 GiB
> MMC: dwmmc at ff0c0000: 1, dwmmc at ff0f0000: 0
> Loading Environment from MMC... *** Warning - bad CRC, using default
> environment
>
> In: serial
> Out: serial
> Err: serial
> Model: Firefly-RK3288
> Net:
> Warning: ethernet at ff290000 (eth0) using random MAC address -
> ba:90:f6:9f:c4:70
> eth0: ethernet at ff290000
> Hit any key to stop autoboot: 0
> => setenv dfu_alt_info "kernel ram ${kernel_addr_r} 0x4000000"
> => dfu 0 ram 0
>
> Desktop:
>
> [jack at arch-corsair rk3288]$ dfu-util -l
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> Found DFU: [2207:320a] ver=9999, devnum=84, cfg=1, intf=0, path="5-4.1",
> alt=0, name="kernel", serial="UNKNOWN"
>
> [jack at arch-corsair rk3288]$ dfu-util -D test.img -a 0
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> dfu-util: Invalid DFU suffix signature
> dfu-util: A valid DFU suffix will be required in a future dfu-util
> release!!!
> Opening DFU capable USB device...
> ID 2207:320a
> Run-time device DFU version 0110
> Claiming USB DFU Interface...
> Setting Alternate Setting #0 ...
> Determining device status: state = dfuIDLE, status = 0
> dfuIDLE, continuing
> DFU mode device DFU version 0110
> Device returned transfer size 4096
> Copying data from PC to DFU device
> Download [ ] 0% 0 bytes
> dfu-util: Error during download get_status
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
>
I've been debugging this further and from my limited USB knowledge, it
looks like it's missing the host sending a packet. Using wireshark and
usbmon I can see the following flow:
host -> device 4096 byte packet (first transfer of data after setup)
device -> host acks 4096 packet
host -> device 6 byte packet (get dfu status, is missed by device)
host times out on waiting for ack
wireshark screen capture: https://imgur.com/a/ZGopclV
dwc2_otg debug output attached
Any clues on this would be great as I'm at a bit of a loss. I've tried
comparing the ISR with the linux driver but they're very different and
the linux driver seems to handle more edge cases which maybe I'm hitting.
The final few lines of the debug output is the driver receiving the 4096
byte packet, and then nothing else comes through. If I try to send the
file again from the host it can't communicate with the device anymore
until I stop the dfu command from uboot and then start it again.
If anyone has any of the Samsung boards with the same otg driver it
would be great if I could get some confirmation that they still work; we
might be able to pin it down to some Rockchip specific configuration.
Regards,
Jack.
-------------- next part --------------
=> dfu 0 ram 0
dfu_fill_entity_ram: in
dfu_fill_entity_ram: out
dfu_add: cdev: 0xfaf72548 gadget:0xfcfce758 gadget->ep0: 0xfcfce7a4
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54809820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x1d9500
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 0000000000000000
crq->brequest:0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_NULL_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0
x10001
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_NULL_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0
x10001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20d3
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x5480b428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20d3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x5480b428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x5480b428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54009020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5400a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54008028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54009428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 0005060000000000
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : NULL REQ on IN EP-0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100001200
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2091
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000200000900
pkt = 09021b00010102c0 01
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80009, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 9
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 9/9, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[9] = 09021b00010102c0 01
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000200001b00
pkt = 09021b00010102c0 010904000000fe01 020409210f000000 101001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x8001b, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 27
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 27/27, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[27] = 09021b00010102c0 010904000000fe01 020409210f000000 101001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800600030000ff00
pkt = 04030904
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80000, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 4
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 4/4, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[4] = 04030904
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800602030904ff00
pkt = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80028, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 40
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 40/40, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[40] = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800601030904ff00
pkt = 120352006f006300 6b00630068006900 7000
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 120352006f006300 6b00630068006900 7000
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 0009010000000000
dfu_set_alt: intf:0 alt:0
pkt =
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848038(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c1
complete_tx: TX DMA done : ep = 0, tx bytes = 0/0, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[0] =
jack 2
jack 3
jack 4 stopped: 0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800602030904ff00
pkt = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80028, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 40
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 40/40, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[40] = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800604030904ff00
pkt = 0a03740065007300 7400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x8000a, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 10
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 10/10, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[10] = 0a03740065007300 7400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800600030000ff00
pkt = 04030904
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80000, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 4
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 4/4, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[4] = 04030904
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800604030904ff00
pkt = 0a03740065007300 7400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x8000a, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 10
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 10/10, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[10] = 0a03740065007300 7400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 010b000000000000
dfu_set_alt: intf:0 alt:0
pkt =
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848038(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c1
complete_tx: TX DMA done : ep = 0, tx bytes = 0/0, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[0] =
jack 2
jack 3
jack 4 stopped: 0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = a103000000000600
w_value: 0x0 len: 0x6
req_type: 0x20 ctrl->bRequest: 0x3 f_dfu->dfu_state: 0x2
dfu_handle: DFU_REQUEST state 2
state_dfu_idle, bRequest 3
handle_getstatus: in
handle_getstatus: out
dfu_handle: value >= 0 (6)
pkt = 002c01000200
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80000, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 6
dfu_handle: return 0
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 6/6, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[6] = 002c01000200
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0xa019
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 2101000000000010
w_value: 0x0 len: 0x1000
req_type: 0x20 ctrl->bRequest: 0x1 f_dfu->dfu_state: 0x2
dfu_handle: DFU_REQUEST state 2
state_dfu_idle, bRequest 1
USB_REQ_DFU_DNLOAD len 4096
handle_dnload len 4096
dfu_handle: value >= 0 (4096)
pkt = 002c010002007300 7400000000000000 0000000000000000 0000000000000000 0000000000000000 0000000000000000 0000000000
000000 0000000000000000
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787b00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 64
dfu_handle: return 0
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 64/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 4032
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787b40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787b40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 128/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3968
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787b80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787b80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 192/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3904
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787bc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787bc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 256/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3840
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787c00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787c00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 320/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3776
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787c40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787c40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 384/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3712
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787c80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787c80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 448/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3648
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787cc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787cc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 512/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3584
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787d00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787d00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 576/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3520
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787d40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787d40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 640/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3456
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787d80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787d80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 704/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3392
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787dc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787dc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 768/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3328
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787e00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787e00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 832/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3264
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787e40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787e40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 896/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3200
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787e80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787e80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 960/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3136
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787ec0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787ec0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1024/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3072
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787f00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787f00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1088/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3008
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787f40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787f40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1152/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2944
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787f80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787f80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1216/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2880
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787fc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787fc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1280/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2816
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788000,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788000, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1344/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2752
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788040,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788040, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1408/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2688
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788080,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788080, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1472/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2624
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7880c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7880c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1536/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2560
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788100,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788100, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1600/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2496
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788140,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788140, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1664/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2432
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788180,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788180, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1728/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2368
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7881c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7881c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1792/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2304
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788200,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788200, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1856/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2240
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788240,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788240, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1920/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2176
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788280,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788280, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1984/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2112
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7882c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7882c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2048/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2048
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788300,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788300, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2112/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1984
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788340,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788340, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2176/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1920
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788380,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788380, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2240/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1856
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7883c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7883c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2304/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1792
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788400,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788400, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2368/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1728
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788440,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788440, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2432/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1664
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788480,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788480, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2496/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1600
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7884c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7884c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2560/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1536
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788500,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788500, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2624/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1472
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788540,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788540, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2688/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1408
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788580,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788580, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2752/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1344
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7885c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7885c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2816/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1280
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788600,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788600, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2880/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1216
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788640,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788640, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2944/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1152
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788680,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788680, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3008/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1088
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7886c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7886c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3072/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1024
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788700,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788700, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3136/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 960
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788740,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788740, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3200/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 896
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788780,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788780, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3264/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 832
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7887c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7887c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3328/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 768
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788800,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788800, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3392/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 704
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788840,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788840, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3456/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 640
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788880,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788880, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3520/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 576
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7888c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7888c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3584/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 512
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788900,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788900, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3648/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 448
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788940,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788940, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3712/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 384
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788980,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788980, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3776/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 320
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7889c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7889c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3840/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 256
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788a00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788a00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3904/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 192
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788a40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788a40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3968/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 128
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788a80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788a80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 4032/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 64
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788ac0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788ac0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888038(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 4096/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 0
=> Send ZLP
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848038(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c1
complete_tx: TX DMA done : ep = 0, tx bytes = 4096/4096, is_short = 0, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[4096] = 2b1c7c8debb7e47f 854fd60196bd4753 c5bc79c706252d09 b914781144463505 8752937cbb9f3cef be1795bb5fe362ed 31d7
922cf9301210 cb9ef3e070d4d6d7
jack 2
jack 3
dnload_request_complete
ret: 0
jack 4 stopped: 0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x21
complete_rx: RX DMA done : NULL REQ on OUT EP-0
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
^ permalink raw reply [flat|nested] 5+ messages in thread* [U-Boot] dfu broken on rk3288 dwc2_otg
2019-01-21 17:55 [U-Boot] dfu broken on rk3288 dwc2_otg Jack Mitchell
` (2 preceding siblings ...)
2019-01-24 11:34 ` Jack Mitchell
@ 2019-01-24 11:37 ` Jack Mitchell
3 siblings, 0 replies; 5+ messages in thread
From: Jack Mitchell @ 2019-01-24 11:37 UTC (permalink / raw)
To: u-boot
On 21/01/2019 17:55, Jack Mitchell wrote:
> Hi,
>
> Has anyone successfully used DFU on an rk3288 or dwc2_otg based board?
> When trying to download a binary to the board over DFU it currently
> seems to timeout and the transfer fails. I have tested the
> firefly-rk3288 and also the Tinkerboard.
>
> I have successfully used the same setup on an am335x beaglebone black on
> the same U-Boot commit.
>
> U-Boot:
>
> U-Boot 2019.01-00189-g2acc24fc28 (Jan 21 2019 - 16:27:07 +0000)
>
> Model: Firefly-RK3288
> DRAM: 4 GiB
> MMC: dwmmc at ff0c0000: 1, dwmmc at ff0f0000: 0
> Loading Environment from MMC... *** Warning - bad CRC, using default
> environment
>
> In: serial
> Out: serial
> Err: serial
> Model: Firefly-RK3288
> Net:
> Warning: ethernet at ff290000 (eth0) using random MAC address -
> ba:90:f6:9f:c4:70
> eth0: ethernet at ff290000
> Hit any key to stop autoboot: 0
> => setenv dfu_alt_info "kernel ram ${kernel_addr_r} 0x4000000"
> => dfu 0 ram 0
>
> Desktop:
>
> [jack at arch-corsair rk3288]$ dfu-util -l
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> Found DFU: [2207:320a] ver=9999, devnum=84, cfg=1, intf=0, path="5-4.1",
> alt=0, name="kernel", serial="UNKNOWN"
>
> [jack at arch-corsair rk3288]$ dfu-util -D test.img -a 0
> dfu-util 0.9
>
> Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
> Copyright 2010-2016 Tormod Volden and Stefan Schmidt
> This program is Free Software and has ABSOLUTELY NO WARRANTY
> Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
>
> dfu-util: Invalid DFU suffix signature
> dfu-util: A valid DFU suffix will be required in a future dfu-util
> release!!!
> Opening DFU capable USB device...
> ID 2207:320a
> Run-time device DFU version 0110
> Claiming USB DFU Interface...
> Setting Alternate Setting #0 ...
> Determining device status: state = dfuIDLE, status = 0
> dfuIDLE, continuing
> DFU mode device DFU version 0110
> Device returned transfer size 4096
> Copying data from PC to DFU device
> Download [ ] 0% 0 bytes
> dfu-util: Error during download get_status
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
>
I've been debugging this further and from my limited USB knowledge, it
looks like it's missing the host sending a packet. Using wireshark and
usbmon I can see the following flow:
host -> device 4096 byte packet (first transfer of data after setup)
device -> host acks 4096 packet
host -> device 6 byte packet (get dfu status, is missed by device)
host times out on waiting for ack
wireshark screen capture: https://imgur.com/a/ZGopclV
dwc2_otg debug output attached
Any clues on this would be great as I'm at a bit of a loss. I've tried
comparing the ISR with the linux driver but they're very different and
the linux driver seems to handle more edge cases which maybe I'm hitting.
The final few lines of the debug output is the driver receiving the 4096
byte packet, and then nothing else comes through. If I try to send the
file again from the host it can't communicate with the device anymore
until I stop the dfu command from uboot and then start it again.
If anyone has any of the Samsung boards with the same otg driver it
would be great if I could get some confirmation that they still work; we
might be able to pin it down to some Rockchip specific configuration.
Regards,
Jack.
-------------- next part --------------
=> dfu 0 ram 0
dfu_fill_entity_ram: in
dfu_fill_entity_ram: out
dfu_add: cdev: 0xfaf72548 gadget:0xfcfce758 gadget->ep0: 0xfcfce7a4
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54809820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x1d9500
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 0000000000000000
crq->brequest:0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_NULL_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0
x10001
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_NULL_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0
x10001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20d3
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x5480b428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20d3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x5480b428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x5480b428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54008c20(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100004000
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54889428(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x0
*** dwc2_udc_irq : GINTSTS=0x54009020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5400a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54008028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54009428(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
Reset interrupt - (GOTGCTL):0xd0000
OTG core got reset (1)!!
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54008420(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Early suspend interrupt
*** dwc2_udc_irq : GINTSTS=0x54008820(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Suspend interrupt :(DSTS):0x400003
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54008020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54809020(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Reset interrupt - (GOTGCTL):0xd0000
*** dwc2_udc_irq : GINTSTS=0x5480a028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
Speed Detection interrupt
High Speed Detection : 0x0
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 0005060000000000
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c3
complete_tx: TX DMA done : NULL REQ on IN EP-0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000100001200
pkt = 1201000200000040 07220a3299990102 0001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2091
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 1201000200000040 07220a3299990102 0001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000200000900
pkt = 09021b00010102c0 01
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80009, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 9
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 9/9, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[9] = 09021b00010102c0 01
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 8006000200001b00
pkt = 09021b00010102c0 010904000000fe01 020409210f000000 101001
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x8001b, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 27
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 27/27, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[27] = 09021b00010102c0 010904000000fe01 020409210f000000 101001
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800600030000ff00
pkt = 04030904
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80000, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 4
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 4/4, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[4] = 04030904
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800602030904ff00
pkt = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80028, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 40
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 40/40, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[40] = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800601030904ff00
pkt = 120352006f006300 6b00630068006900 7000
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80012, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 18
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 18/18, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[18] = 120352006f006300 6b00630068006900 7000
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 0009010000000000
dfu_set_alt: intf:0 alt:0
pkt =
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848038(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c1
complete_tx: TX DMA done : ep = 0, tx bytes = 0/0, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[0] =
jack 2
jack 3
jack 4 stopped: 0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800602030904ff00
pkt = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80028, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 40
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 40/40, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[40] = 2803550053004200 200064006f007700 6e006c006f006100 6400200067006100 6400670065007400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800604030904ff00
pkt = 0a03740065007300 7400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x8000a, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 10
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 10/10, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[10] = 0a03740065007300 7400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800600030000ff00
pkt = 04030904
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80000, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 4
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 4/4, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[4] = 04030904
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 800604030904ff00
pkt = 0a03740065007300 7400
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x8000a, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 10
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 10/10, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[10] = 0a03740065007300 7400
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 010b000000000000
dfu_set_alt: intf:0 alt:0
pkt =
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848038(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c1
complete_tx: TX DMA done : ep = 0, tx bytes = 0/0, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[0] =
jack 2
jack 3
jack 4 stopped: 0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x8009
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = a103000000000600
w_value: 0x0 len: 0x6
req_type: 0x20 ctrl->bRequest: 0x3 f_dfu->dfu_state: 0x2
dfu_handle: DFU_REQUEST state 2
state_dfu_idle, bRequest 3
handle_getstatus: in
handle_getstatus: out
dfu_handle: value >= 0 (6)
pkt = 002c01000200
setdma_tx:EP0 TX DMA start : DIEPDMA0 = 0xfb787b00,DIEPTSIZ0 = 0x80000, DIEPCTL0 = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 6
dfu_handle: return 0
*** dwc2_udc_irq : GINTSTS=0x54848028(on state WAIT_FOR_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1000
1
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x2081
complete_tx: TX DMA done : ep = 0, tx bytes = 6/6, is_short = 1, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[6] = 002c01000200
jack 2
jack 3
jack 4 stopped: 0
dwc2_ep0_complete_out : Prepare Complete Out packet.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x
10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_OUT_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK
: 0x10001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54888028(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0xa019
complete_rx: RX DMA done : NULL REQ on OUT EP-0
SETUP packet arrived
dwc2_handle_ep0: WAIT_FOR_SETUP
pkt = 2101000000000010
w_value: 0x0 len: 0x1000
req_type: 0x20 ctrl->bRequest: 0x1 f_dfu->dfu_state: 0x2
dfu_handle: DFU_REQUEST state 2
state_dfu_idle, bRequest 1
USB_REQ_DFU_DNLOAD len 4096
handle_dnload len 4096
dfu_handle: value >= 0 (4096)
pkt = 002c010002007300 7400000000000000 0000000000000000 0000000000000000 0000000000000000 0000000000000000 0000000000
000000 0000000000000000
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787b00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787b00, pktcnt = 1, xfersize = 64
dfu_handle: return 0
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 64/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 4032
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787b40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787b40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 128/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3968
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787b80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787b80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 192/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3904
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787bc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787bc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 256/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3840
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787c00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787c00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 320/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3776
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787c40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787c40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 384/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3712
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787c80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787c80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 448/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3648
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787cc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787cc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 512/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3584
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787d00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787d00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 576/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3520
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787d40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787d40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 640/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3456
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787d80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787d80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 704/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3392
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787dc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787dc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 768/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3328
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787e00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787e00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 832/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3264
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787e40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787e40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 896/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3200
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787e80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787e80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 960/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3136
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787ec0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787ec0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1024/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3072
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787f00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787f00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1088/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 3008
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787f40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787f40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1152/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2944
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787f80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787f80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1216/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2880
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb787fc0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb787fc0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1280/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2816
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788000,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788000, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1344/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2752
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788040,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788040, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1408/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2688
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788080,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788080, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1472/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2624
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7880c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7880c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1536/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2560
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788100,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788100, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1600/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2496
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788140,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788140, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1664/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2432
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788180,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788180, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1728/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2368
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7881c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7881c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1792/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2304
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788200,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788200, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1856/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2240
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788240,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788240, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1920/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2176
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788280,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788280, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 1984/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2112
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7882c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7882c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2048/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 2048
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788300,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788300, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2112/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1984
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788340,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788340, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2176/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1920
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788380,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788380, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2240/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1856
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7883c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7883c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2304/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1792
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788400,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788400, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2368/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1728
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788440,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788440, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2432/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1664
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788480,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788480, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2496/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1600
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7884c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7884c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2560/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1536
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788500,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788500, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2624/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1472
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788540,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788540, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2688/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1408
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788580,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788580, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2752/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1344
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7885c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7885c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2816/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1280
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788600,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788600, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2880/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1216
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788640,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788640, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 2944/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1152
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788680,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788680, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3008/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1088
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7886c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7886c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3072/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 1024
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788700,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788700, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3136/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 960
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788740,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788740, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3200/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 896
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788780,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788780, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3264/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 832
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7887c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7887c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3328/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 768
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788800,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788800, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3392/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 704
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788840,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788840, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3456/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 640
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788880,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788880, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3520/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 576
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7888c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7888c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3584/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 512
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788900,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788900, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3648/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 448
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788940,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788940, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3712/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 384
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788980,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788980, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3776/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 320
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb7889c0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb7889c0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3840/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 256
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788a00,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788a00, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3904/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 192
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788a40,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788a40, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 3968/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 128
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788a80,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788a80, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888028(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 4032/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 64
setdma_rx: EP0 RX DMA start : DOEPDMA = 0xfb788ac0,DOEPTSIZ = 0x80040, DOEPCTL = 0x80008000
buf = 0xfb788ac0, pktcnt = 1, xfersize = 64
*** dwc2_udc_irq : GINTSTS=0x54888038(on state DATA_STATE_RECV), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x10
001
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x2011
complete_rx: RX DMA done : ep = 0, rx bytes = 4096/4096, is_short = 0, DOEPTSIZ = 0x0, remained bytes = 0
=> Send ZLP
dwc2_udc_ep0_zlp in
dwc2_udc_ep0_zlp out
*** dwc2_udc_irq : GINTSTS=0x54848038(on state WAIT_FOR_IN_COMPLETE), GINTMSK : 0x800c3800,DAINT : 0x1, DAINTMSK : 0x1
0001
*** process_ep_in_intr: EP In interrupt : DAINT = 0x1
EP0-IN : DIEPINT = 0x20c1
complete_tx: TX DMA done : ep = 0, tx bytes = 4096/4096, is_short = 0, DIEPTSIZ = 0x0, remained bytes = 0
complete_tx: ep_num = 0, completing request
calling complete callback
jack 1
pkt[4096] = 2b1c7c8debb7e47f 854fd60196bd4753 c5bc79c706252d09 b914781144463505 8752937cbb9f3cef be1795bb5fe362ed 31d7
922cf9301210 cb9ef3e070d4d6d7
jack 2
jack 3
dnload_request_complete
ret: 0
jack 4 stopped: 0
dwc2_udc_pre_setup : Prepare Setup packets.
*** dwc2_udc_irq : GINTSTS=0x54888038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x10000, DAINTMSK : 0x100
01
*** process_ep_out_intr: EP OUT interrupt : DAINT = 0x10000
EP0-OUT : DOEPINT = 0x21
complete_rx: RX DMA done : NULL REQ on OUT EP-0
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
*** dwc2_udc_irq : GINTSTS=0x54808038(on state WAIT_FOR_SETUP), GINTMSK : 0x800c3800,DAINT : 0x0, DAINTMSK : 0x10001
^ permalink raw reply [flat|nested] 5+ messages in thread