[U-Boot] [PATCH v2 20/22] colibri_vf: adjust timing according to data sheet

Igor Opaniuk
2019-03-28T16:41:24Z

Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>

On Mon, Mar 25, 2019 at 6:32 PM Marcel Ziswiler <marcel@ziswiler.com> wrote:
>
> From: Stefan Agner <stefan.agner@toradex.com>
>
> Using the DDR Validation tool in Processor Expert uncovered two
> timing inconsistencies. Since those timings are related to the
> suspend mode they do not affect or change regular memory behaviour.
>
> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
>
> ---
>
> Changes in v2: None
>
> board/toradex/colibri_vf/colibri_vf.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
> index 9c5bf4951b..3e39912f91 100644
> --- a/board/toradex/colibri_vf/colibri_vf.c
> +++ b/board/toradex/colibri_vf/colibri_vf.c
> @@ -101,15 +101,21 @@ int dram_init(void)
> .tras_lockout = 0,
> .tdal = 12,
> .bstlen = 3,
> - .tdll = 512,
> + .tdll = 512, /* not applicable since freq. scaling
> + * is not used
> + */
> .trp_ab = 6,
> .tref = 3120,
> .trfc = 64,
> .tref_int = 0,
> .tpdex = 3,
> .txpdll = 10,
> - .txsnr = 48,
> - .txsr = 468,
> + .txsnr = 68, /* changed to conform to JEDEC
> + * specifications
> + */
> + .txsr = 506, /* changed to conform to JEDEC
> + * specifications
> + */
> .cksrx = 5,
> .cksre = 5,
> .freq_chg_en = 0,
> --
> 2.20.1
>
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