* [U-Boot] [RFC PATCH 1/3] sunxi: Use clrsetbits_le32 instead of multiple instruction
@ 2019-02-12 16:57 Michael Trimarchi
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33 Michael Trimarchi
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization Michael Trimarchi
0 siblings, 2 replies; 9+ messages in thread
From: Michael Trimarchi @ 2019-02-12 16:57 UTC (permalink / raw)
To: u-boot
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/mach-sunxi/dram_sun8i_a33.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c b/arch/arm/mach-sunxi/dram_sun8i_a33.c
index 1da2727f98..83212aaddf 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a33.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a33.c
@@ -148,12 +148,8 @@ static void auto_set_timing_para(struct dram_para *para)
reg_val = (tcksrx << 24) | (tcksre << 16) | (tckesr << 8) | (tcke << 0);
writel(reg_val, &mctl_ctl->dramtmg5);
/* Set two rank timing and exit self-refresh timing */
- reg_val = readl(&mctl_ctl->dramtmg8);
- reg_val &= ~(0xff << 8);
- reg_val &= ~(0xff << 0);
- reg_val |= (0x33 << 8);
- reg_val |= (0x8 << 0);
- writel(reg_val, &mctl_ctl->dramtmg8);
+ clrsetbits_le32(&mctl_ctl->dramtmg8, (0xff << 8) | (0xff << 0),
+ 0x33 << 8 | (0x8 << 0));
/* Set phy interface time */
reg_val = (0x2 << 24) | (t_rdata_en << 16) | (0x1 << 8)
| (wr_latency << 0);
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33
2019-02-12 16:57 [U-Boot] [RFC PATCH 1/3] sunxi: Use clrsetbits_le32 instead of multiple instruction Michael Trimarchi
@ 2019-02-12 16:57 ` Michael Trimarchi
2019-02-13 8:44 ` Maxime Ripard
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization Michael Trimarchi
1 sibling, 1 reply; 9+ messages in thread
From: Michael Trimarchi @ 2019-02-12 16:57 UTC (permalink / raw)
To: u-boot
Change the size create a glitch in the clke signal on second
bank. The glitch can generate problem in memory initialiazation
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/mach-sunxi/dram_sun8i_a33.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c b/arch/arm/mach-sunxi/dram_sun8i_a33.c
index 83212aaddf..d73a93a132 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a33.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a33.c
@@ -45,14 +45,12 @@ static void mctl_set_cr(struct dram_para *para)
static void auto_detect_dram_size(struct dram_para *para)
{
- u8 orig_rank = para->rank;
int rows, columns;
/* Row detect */
para->page_size = 512;
para->seq = 1;
para->rows = 16;
- para->rank = 1;
mctl_set_cr(para);
for (rows = 11 ; rows < 16 ; rows++) {
if (mctl_mem_matches(1 << (rows + 9))) /* row-column */
@@ -69,7 +67,6 @@ static void auto_detect_dram_size(struct dram_para *para)
}
para->seq = 0;
- para->rank = orig_rank;
para->rows = rows;
para->page_size = 1 << columns;
mctl_set_cr(para);
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread* [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33 Michael Trimarchi
@ 2019-02-13 8:44 ` Maxime Ripard
2019-02-13 8:49 ` Michael Nazzareno Trimarchi
0 siblings, 1 reply; 9+ messages in thread
From: Maxime Ripard @ 2019-02-13 8:44 UTC (permalink / raw)
To: u-boot
On Tue, Feb 12, 2019 at 05:57:07PM +0100, Michael Trimarchi wrote:
> Change the size create a glitch in the clke signal on second
> bank.
Which glitch?
> The glitch can generate problem in memory initialiazation
Which problem? on which board? How do we reproduce it?
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33
2019-02-13 8:44 ` Maxime Ripard
@ 2019-02-13 8:49 ` Michael Nazzareno Trimarchi
2019-02-13 11:10 ` Michael Nazzareno Trimarchi
0 siblings, 1 reply; 9+ messages in thread
From: Michael Nazzareno Trimarchi @ 2019-02-13 8:49 UTC (permalink / raw)
To: u-boot
Hi Maxime
On Wed, Feb 13, 2019 at 9:44 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Tue, Feb 12, 2019 at 05:57:07PM +0100, Michael Trimarchi wrote:
> > Change the size create a glitch in the clke signal on second
> > bank.
>
> Which glitch?
>
> > The glitch can generate problem in memory initialiazation
>
> Which problem? on which board? How do we reproduce it?
Yes I know. I'm working on production of a device and fix some failing board.
You can check the glitch here. I will adjust the commit soon.
A33, 2GB, double rank
Michael
>
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33
2019-02-13 8:49 ` Michael Nazzareno Trimarchi
@ 2019-02-13 11:10 ` Michael Nazzareno Trimarchi
0 siblings, 0 replies; 9+ messages in thread
From: Michael Nazzareno Trimarchi @ 2019-02-13 11:10 UTC (permalink / raw)
To: u-boot
Hi Maxime
On Wed, Feb 13, 2019 at 9:49 AM Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
>
> Hi Maxime
>
> On Wed, Feb 13, 2019 at 9:44 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> >
> > On Tue, Feb 12, 2019 at 05:57:07PM +0100, Michael Trimarchi wrote:
> > > Change the size create a glitch in the clke signal on second
> > > bank.
> >
> > Which glitch?
> >
> > > The glitch can generate problem in memory initialiazation
> >
> > Which problem? on which board? How do we reproduce it?
>
> Yes I know. I'm working on production of a device and fix some failing board.
> You can check the glitch here. I will adjust the commit soon.
> A33, 2GB, double rank
Did you get the screenshot on your email?
Michael
>
> Michael
> >
> > Maxime
> >
> > --
> > Maxime Ripard, Bootlin
> > Embedded Linux and Kernel engineering
> > https://bootlin.com
>
>
>
> --
> | Michael Nazzareno Trimarchi Amarula Solutions BV |
> | COO - Founder Cruquiuskade 47 |
> | +31(0)851119172 Amsterdam 1018 AM NL |
> | [`as] http://www.amarulasolutions.com |
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization
2019-02-12 16:57 [U-Boot] [RFC PATCH 1/3] sunxi: Use clrsetbits_le32 instead of multiple instruction Michael Trimarchi
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33 Michael Trimarchi
@ 2019-02-12 16:57 ` Michael Trimarchi
2019-02-13 8:45 ` Maxime Ripard
1 sibling, 1 reply; 9+ messages in thread
From: Michael Trimarchi @ 2019-02-12 16:57 UTC (permalink / raw)
To: u-boot
Set two rank timing and exit self-refresh timing seems not done
properly. We know use the same write that we are using
on H5 silicon.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
arch/arm/mach-sunxi/dram_sun8i_a33.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c b/arch/arm/mach-sunxi/dram_sun8i_a33.c
index d73a93a132..355fe30aba 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a33.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a33.c
@@ -146,7 +146,7 @@ static void auto_set_timing_para(struct dram_para *para)
writel(reg_val, &mctl_ctl->dramtmg5);
/* Set two rank timing and exit self-refresh timing */
clrsetbits_le32(&mctl_ctl->dramtmg8, (0xff << 8) | (0xff << 0),
- 0x33 << 8 | (0x8 << 0));
+ 0x33 << 8 | (0x10 << 0));
/* Set phy interface time */
reg_val = (0x2 << 24) | (t_rdata_en << 16) | (0x1 << 8)
| (wr_latency << 0);
--
2.17.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization Michael Trimarchi
@ 2019-02-13 8:45 ` Maxime Ripard
2019-02-13 8:50 ` Michael Nazzareno Trimarchi
0 siblings, 1 reply; 9+ messages in thread
From: Maxime Ripard @ 2019-02-13 8:45 UTC (permalink / raw)
To: u-boot
On Tue, Feb 12, 2019 at 05:57:08PM +0100, Michael Trimarchi wrote:
> Set two rank timing and exit self-refresh timing seems not done
> properly.
Why?
Seriously, a commit log isn't there to vaguely describe whatever
you're doing. It's there to expose what precise issue you faced, and
how you overcame it.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization
2019-02-13 8:45 ` Maxime Ripard
@ 2019-02-13 8:50 ` Michael Nazzareno Trimarchi
2019-02-13 15:54 ` Maxime Ripard
0 siblings, 1 reply; 9+ messages in thread
From: Michael Nazzareno Trimarchi @ 2019-02-13 8:50 UTC (permalink / raw)
To: u-boot
Hi Maxime
On Wed, Feb 13, 2019 at 9:45 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
>
> On Tue, Feb 12, 2019 at 05:57:08PM +0100, Michael Trimarchi wrote:
> > Set two rank timing and exit self-refresh timing seems not done
> > properly.
>
> Why?
>
> Seriously, a commit log isn't there to vaguely describe whatever
> you're doing. It's there to expose what precise issue you faced, and
> how you overcame it.
I have no documentation, I know only the result. Test was cycling booting
from FEL over usb. I was having on some sample 30% of failure and now
I have 100% of success.
Michael
>
> Maxime
>
> --
> Maxime Ripard, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
--
| Michael Nazzareno Trimarchi Amarula Solutions BV |
| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
^ permalink raw reply [flat|nested] 9+ messages in thread
* [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization
2019-02-13 8:50 ` Michael Nazzareno Trimarchi
@ 2019-02-13 15:54 ` Maxime Ripard
0 siblings, 0 replies; 9+ messages in thread
From: Maxime Ripard @ 2019-02-13 15:54 UTC (permalink / raw)
To: u-boot
On Wed, Feb 13, 2019 at 09:50:44AM +0100, Michael Nazzareno Trimarchi wrote:
> Hi Maxime
>
> On Wed, Feb 13, 2019 at 9:45 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> >
> > On Tue, Feb 12, 2019 at 05:57:08PM +0100, Michael Trimarchi wrote:
> > > Set two rank timing and exit self-refresh timing seems not done
> > > properly.
> >
> > Why?
> >
> > Seriously, a commit log isn't there to vaguely describe whatever
> > you're doing. It's there to expose what precise issue you faced, and
> > how you overcame it.
>
> I have no documentation, I know only the result. Test was cycling booting
> from FEL over usb. I was having on some sample 30% of failure and now
> I have 100% of success.
Well, that's still a pretty good information to give. On which boards,
with which DRAM setup? with which SoC? etc.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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2019-02-12 16:57 [U-Boot] [RFC PATCH 1/3] sunxi: Use clrsetbits_le32 instead of multiple instruction Michael Trimarchi
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 2/3] sunxi: Don't change the rank in dram size detection in A33 Michael Trimarchi
2019-02-13 8:44 ` Maxime Ripard
2019-02-13 8:49 ` Michael Nazzareno Trimarchi
2019-02-13 11:10 ` Michael Nazzareno Trimarchi
2019-02-12 16:57 ` [U-Boot] [RFC PATCH 3/3] sunxi: Fix A33 memory initialization Michael Trimarchi
2019-02-13 8:45 ` Maxime Ripard
2019-02-13 8:50 ` Michael Nazzareno Trimarchi
2019-02-13 15:54 ` Maxime Ripard
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