* [U-Boot] [PATCH v2] warp7: Fix the write to the LDOGCTL PMIC register
@ 2019-02-14 13:37 Fabio Estevam
0 siblings, 0 replies; only message in thread
From: Fabio Estevam @ 2019-02-14 13:37 UTC (permalink / raw)
To: u-boot
The third parameter of the pmic_clrsetbits() function is the mask
to the register and the correct mask is 1 not 0.
Since the LDOGCTL only contains a single valid bit (bit 0),
we can use pmic_reg_write() and write 1 directly, which fixes
the problem in a simpler way and use the original pmic function
that was used prior to the DM PMIC conversion.
Fixes: 8ba377321c86 ("arm: imx7s-warp: Convert to DM PMIC")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
Changes since v1:
- Fix typo in commit message: "contains a single valid bit"
board/warp7/warp7.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
index 49f290f978..2882dc9870 100644
--- a/board/warp7/warp7.c
+++ b/board/warp7/warp7.c
@@ -77,7 +77,7 @@ int power_init_board(void)
printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
/* disable Low Power Mode during standby mode */
- pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
+ pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
return 0;
}
--
2.17.1
^ permalink raw reply related [flat|nested] only message in thread
only message in thread, other threads:[~2019-02-14 13:37 UTC | newest]
Thread overview: (only message) (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-02-14 13:37 [U-Boot] [PATCH v2] warp7: Fix the write to the LDOGCTL PMIC register Fabio Estevam
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox