[U-Boot] [PATCH 1/3] videomodes: Allow EDID timings where hsync/vsync pulse is 0

[U-Boot] [PATCH 1/3] videomodes: Allow EDID timings where hsync/vsync pulse is 0

[Priit Laes]

From: Priit Laes <priit.laes@paf.com>

Current EDID detailed timing parser errors out when either
horizontal or vertical pulse sync width is 0, thus not
allowing a display with EDID listed below work properly.

Of-course, this is somewhat quirky HDMI display with following
anti-features:
- HPD pin is not usable
- although resolution is 640x480, only top 240 pixels are visible

$ xxd -p display.edid
00ffffffffffff0005a1e00301000000150f0103800f05780a0f6ea05748
9a2610474f200000010101010101010101010101010101012a08804520e0
0b1020004000953600000018000000fd0034441a2403000a202020202020
0000001000310a20202020202020202020200000001000002a4030701300
782d1100001e006b

$ edid-decode display.edid
EDID version: 1.3
Manufacturer: AMA Model 3e0 Serial Number 1
Digital display
Maximum image size: 15 cm x 5 cm
Gamma: 2.20
RGB color display
First detailed timing is preferred timing
Display x,y Chromaticity:
  Red:   0.6250, 0.3398
  Green: 0.2841, 0.6044
  Blue:  0.1494, 0.0644
  White: 0.2802, 0.3105
Established timings supported:
  640x480 at 60Hz 4:3 HorFreq: 31469 Hz Clock: 25.175 MHz
Standard timings supported:
Detailed mode: Clock 20.900 MHz, 149 mm x 54 mm
                640  672  672  709 hborder 0
                480  484  484  491 vborder 0
               -hsync -vsync
               VertFreq: 60 Hz, HorFreq: 29478 Hz
Monitor ranges (GTF): 52-68Hz V, 26-36kHz H, max dotclock 30MHz
Dummy block
Dummy block
Checksum: 0x6b (valid)

Signed-off-by: Priit Laes <priit.laes@paf.com>
---
 drivers/video/videomodes.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c
index 74bafff011..1cfeaa980f 100644
--- a/drivers/video/videomodes.c
+++ b/drivers/video/videomodes.c
@@ -396,9 +396,7 @@ int video_edid_dtd_to_ctfb_res_modes(struct edid_detailed_timing *t,
 	    EDID_DETAILED_TIMING_VERTICAL_ACTIVE(*t) == 0 ||
 	    EDID_DETAILED_TIMING_VERTICAL_BLANKING(*t) == 0 ||
 	    EDID_DETAILED_TIMING_HSYNC_OFFSET(*t) == 0 ||
-	    EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(*t) == 0 ||
 	    EDID_DETAILED_TIMING_VSYNC_OFFSET(*t) == 0 ||
-	    EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(*t) == 0 ||
 	    /* 3d formats are not supported*/
 	    EDID_DETAILED_TIMING_FLAG_STEREO(*t) != 0)
 		return -EINVAL;
-- 
2.11.0

[U-Boot] [PATCH 2/3] sunxi: display: Move DDC PLL setup to HDMI init

[Priit Laes]

From: Priit Laes <priit.laes@paf.com>

Move PLL initialization code to single place so
we won't call it every time we query for EDID data.

Signed-off-by: Priit Laes <priit.laes@paf.com>
---
 drivers/video/sunxi/sunxi_display.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index 6dd9bec351..0362071f72 100644
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -113,6 +113,13 @@ static int sunxi_hdmi_hpd_detect(int hpd_delay)
 	writel(SUNXI_HDMI_CTRL_ENABLE, &hdmi->ctrl);
 	writel(SUNXI_HDMI_PAD_CTRL0_HDP, &hdmi->pad_ctrl0);
 
+	/* Enable PLLs for eventual DDC */
+	writel(SUNXI_HDMI_PAD_CTRL1 | SUNXI_HDMI_PAD_CTRL1_HALVE,
+	       &hdmi->pad_ctrl1);
+	writel(SUNXI_HDMI_PLL_CTRL | SUNXI_HDMI_PLL_CTRL_DIV(15),
+	       &hdmi->pll_ctrl);
+	writel(SUNXI_HDMI_PLL_DBG0_PLL3, &hdmi->pll_dbg0);
+
 	while (timer_get_us() < tmo) {
 		if (readl(&hdmi->hpd) & SUNXI_HDMI_HPD_DETECT)
 			return 1;
@@ -215,13 +222,6 @@ static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode)
 		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 	int i, r, ext_blocks = 0;
 
-	/* SUNXI_HDMI_CTRL_ENABLE & PAD_CTRL0 are already set by hpd_detect */
-	writel(SUNXI_HDMI_PAD_CTRL1 | SUNXI_HDMI_PAD_CTRL1_HALVE,
-	       &hdmi->pad_ctrl1);
-	writel(SUNXI_HDMI_PLL_CTRL | SUNXI_HDMI_PLL_CTRL_DIV(15),
-	       &hdmi->pll_ctrl);
-	writel(SUNXI_HDMI_PLL_DBG0_PLL3, &hdmi->pll_dbg0);
-
 	/* Reset i2c controller */
 	setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_DDC_GATE);
 	writel(SUNXI_HMDI_DDC_CTRL_ENABLE |
-- 
2.11.0

[U-Boot] [PATCH 3/3] sunxi: display: Implement fallback to ddc probe when hpd fails

[Priit Laes]

From: Priit Laes <priit.laes@paf.com>

There are HDMI displays where hpd pin is not connected, thus
we cannot get it to work unless we specifically set the resolution.

Rework the display probing, so hotplug detect failure causes
fallback to probing ddc for EDID data.

Signed-off-by: Priit Laes <priit.laes@paf.com>
---
 drivers/video/sunxi/sunxi_display.c | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index 0362071f72..46436b88c5 100644
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -210,7 +210,8 @@ static int sunxi_hdmi_edid_get_block(int block, u8 *buf)
 	return r;
 }
 
-static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode)
+static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode,
+				    bool verbose_mode)
 {
 	struct edid1_info edid1;
 	struct edid_cea861_info cea681[4];
@@ -241,7 +242,8 @@ static int sunxi_hdmi_edid_get_mode(struct ctfb_res_modes *mode)
 	if (r == 0) {
 		r = edid_check_info(&edid1);
 		if (r) {
-			printf("EDID: invalid EDID data\n");
+			if (verbose_mode)
+				printf("EDID: invalid EDID data\n");
 			r = -EINVAL;
 		}
 	}
@@ -1082,7 +1084,8 @@ void *video_hw_init(void)
 	struct ctfb_res_modes custom;
 	const char *options;
 #ifdef CONFIG_VIDEO_HDMI
-	int ret, hpd, hpd_delay, edid;
+	int hpd, hpd_delay, edid;
+	bool hdmi_present;
 #endif
 	int i, overscan_offset, overscan_x, overscan_y;
 	unsigned int fb_dma_addr;
@@ -1118,12 +1121,23 @@ void *video_hw_init(void)
 	if (sunxi_display.monitor == sunxi_monitor_dvi ||
 	    sunxi_display.monitor == sunxi_monitor_hdmi) {
 		/* Always call hdp_detect, as it also enables clocks, etc. */
-		ret = sunxi_hdmi_hpd_detect(hpd_delay);
-		if (ret) {
+		hdmi_present = (sunxi_hdmi_hpd_detect(hpd_delay) == 1);
+		if (hdmi_present && edid) {
 			printf("HDMI connected: ");
-			if (edid && sunxi_hdmi_edid_get_mode(&custom) == 0)
+			if (sunxi_hdmi_edid_get_mode(&custom, true) == 0)
 				mode = &custom;
-		} else if (hpd) {
+			else
+				hdmi_present = false;
+		}
+		/* Fall back to EDID in case HPD failed */
+		if (edid && !hdmi_present) {
+			if (sunxi_hdmi_edid_get_mode(&custom, false) == 0) {
+				mode = &custom;
+				hdmi_present = true;
+			}
+		}
+		/* Shut down when display was not found */
+		if ((hpd || edid) && !hdmi_present) {
 			sunxi_hdmi_shutdown();
 			sunxi_display.monitor = sunxi_get_default_mon(false);
 		} /* else continue with hdmi/dvi without a cable connected */
-- 
2.11.0

[U-Boot] [PATCH 1/3] videomodes: Allow EDID timings where hsync/vsync pulse is 0

[Jagan Teki]

Hi Anatolij,

On Wed, Dec 19, 2018 at 6:36 PM Priit Laes <plaes@plaes.org> wrote:
>
> From: Priit Laes <priit.laes@paf.com>
>
> Current EDID detailed timing parser errors out when either
> horizontal or vertical pulse sync width is 0, thus not
> allowing a display with EDID listed below work properly.
>
> Of-course, this is somewhat quirky HDMI display with following
> anti-features:
> - HPD pin is not usable
> - although resolution is 640x480, only top 240 pixels are visible
>
> $ xxd -p display.edid
> 00ffffffffffff0005a1e00301000000150f0103800f05780a0f6ea05748
> 9a2610474f200000010101010101010101010101010101012a08804520e0
> 0b1020004000953600000018000000fd0034441a2403000a202020202020
> 0000001000310a20202020202020202020200000001000002a4030701300
> 782d1100001e006b
>
> $ edid-decode display.edid
> EDID version: 1.3
> Manufacturer: AMA Model 3e0 Serial Number 1
> Digital display
> Maximum image size: 15 cm x 5 cm
> Gamma: 2.20
> RGB color display
> First detailed timing is preferred timing
> Display x,y Chromaticity:
>   Red:   0.6250, 0.3398
>   Green: 0.2841, 0.6044
>   Blue:  0.1494, 0.0644
>   White: 0.2802, 0.3105
> Established timings supported:
>   640x480 at 60Hz 4:3 HorFreq: 31469 Hz Clock: 25.175 MHz
> Standard timings supported:
> Detailed mode: Clock 20.900 MHz, 149 mm x 54 mm
>                 640  672  672  709 hborder 0
>                 480  484  484  491 vborder 0
>                -hsync -vsync
>                VertFreq: 60 Hz, HorFreq: 29478 Hz
> Monitor ranges (GTF): 52-68Hz V, 26-36kHz H, max dotclock 30MHz
> Dummy block
> Dummy block
> Checksum: 0x6b (valid)
>
> Signed-off-by: Priit Laes <priit.laes@paf.com>
> ---
>  drivers/video/videomodes.c | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c
> index 74bafff011..1cfeaa980f 100644
> --- a/drivers/video/videomodes.c
> +++ b/drivers/video/videomodes.c
> @@ -396,9 +396,7 @@ int video_edid_dtd_to_ctfb_res_modes(struct edid_detailed_timing *t,
>             EDID_DETAILED_TIMING_VERTICAL_ACTIVE(*t) == 0 ||
>             EDID_DETAILED_TIMING_VERTICAL_BLANKING(*t) == 0 ||
>             EDID_DETAILED_TIMING_HSYNC_OFFSET(*t) == 0 ||
> -           EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(*t) == 0 ||
>             EDID_DETAILED_TIMING_VSYNC_OFFSET(*t) == 0 ||
> -           EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(*t) == 0 ||
>             /* 3d formats are not supported*/
>             EDID_DETAILED_TIMING_FLAG_STEREO(*t) != 0)
>                 return -EINVAL;

Any comments? I will mark these patches to you will that be OK?

[U-Boot] [PATCH 1/3] videomodes: Allow EDID timings where hsync/vsync pulse is 0

[Priit Laes]

On Thu, Feb 14, 2019 at 10:42:51PM +0530, Jagan Teki wrote:
> Hi Anatolij,
> 
> On Wed, Dec 19, 2018 at 6:36 PM Priit Laes <plaes@plaes.org> wrote:
> >
> > From: Priit Laes <priit.laes@paf.com>
> >
> > Current EDID detailed timing parser errors out when either
> > horizontal or vertical pulse sync width is 0, thus not
> > allowing a display with EDID listed below work properly.
> >
> > Of-course, this is somewhat quirky HDMI display with following
> > anti-features:
> > - HPD pin is not usable
> > - although resolution is 640x480, only top 240 pixels are visible
> >
> > $ xxd -p display.edid
> > 00ffffffffffff0005a1e00301000000150f0103800f05780a0f6ea05748
> > 9a2610474f200000010101010101010101010101010101012a08804520e0
> > 0b1020004000953600000018000000fd0034441a2403000a202020202020
> > 0000001000310a20202020202020202020200000001000002a4030701300
> > 782d1100001e006b
> >
> > $ edid-decode display.edid
> > EDID version: 1.3
> > Manufacturer: AMA Model 3e0 Serial Number 1
> > Digital display
> > Maximum image size: 15 cm x 5 cm
> > Gamma: 2.20
> > RGB color display
> > First detailed timing is preferred timing
> > Display x,y Chromaticity:
> >   Red:   0.6250, 0.3398
> >   Green: 0.2841, 0.6044
> >   Blue:  0.1494, 0.0644
> >   White: 0.2802, 0.3105
> > Established timings supported:
> >   640x480 at 60Hz 4:3 HorFreq: 31469 Hz Clock: 25.175 MHz
> > Standard timings supported:
> > Detailed mode: Clock 20.900 MHz, 149 mm x 54 mm
> >                 640  672  672  709 hborder 0
> >                 480  484  484  491 vborder 0
> >                -hsync -vsync
> >                VertFreq: 60 Hz, HorFreq: 29478 Hz
> > Monitor ranges (GTF): 52-68Hz V, 26-36kHz H, max dotclock 30MHz
> > Dummy block
> > Dummy block
> > Checksum: 0x6b (valid)
> >
> > Signed-off-by: Priit Laes <priit.laes@paf.com>
> > ---
> >  drivers/video/videomodes.c | 2 --
> >  1 file changed, 2 deletions(-)
> >
> > diff --git a/drivers/video/videomodes.c b/drivers/video/videomodes.c
> > index 74bafff011..1cfeaa980f 100644
> > --- a/drivers/video/videomodes.c
> > +++ b/drivers/video/videomodes.c
> > @@ -396,9 +396,7 @@ int video_edid_dtd_to_ctfb_res_modes(struct edid_detailed_timing *t,
> >             EDID_DETAILED_TIMING_VERTICAL_ACTIVE(*t) == 0 ||
> >             EDID_DETAILED_TIMING_VERTICAL_BLANKING(*t) == 0 ||
> >             EDID_DETAILED_TIMING_HSYNC_OFFSET(*t) == 0 ||
> > -           EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(*t) == 0 ||
> >             EDID_DETAILED_TIMING_VSYNC_OFFSET(*t) == 0 ||
> > -           EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(*t) == 0 ||
> >             /* 3d formats are not supported*/
> >             EDID_DETAILED_TIMING_FLAG_STEREO(*t) != 0)
> >                 return -EINVAL;
> 
> Any comments? I will mark these patches to you will that be OK?

This has been already applied via u-boot-video tree.

[U-Boot] [PATCH 1/3] videomodes: Allow EDID timings where hsync/vsync pulse is 0

[Anatolij Gustschin]

Hi Jagan,

On Thu, 14 Feb 2019 22:42:51 +0530
Jagan Teki jagan at amarulasolutions.com wrote:
... 
> Any comments? I will mark these patches to you will that be OK?

OK, thanks.

--
Anatolij

[U-Boot] [PATCH 2/3] sunxi: display: Move DDC PLL setup to HDMI init

[Anatolij Gustschin]

On Wed, 19 Dec 2018 15:06:08 +0200
Priit Laes plaes at plaes.org wrote:

> From: Priit Laes <priit.laes@paf.com>
> 
> Move PLL initialization code to single place so
> we won't call it every time we query for EDID data.
> 
> Signed-off-by: Priit Laes <priit.laes@paf.com>
> ---
>  drivers/video/sunxi/sunxi_display.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)

Applied to u-boot-video/master, thanks!

--
Anatolij

[U-Boot] [PATCH 3/3] sunxi: display: Implement fallback to ddc probe when hpd fails

[Anatolij Gustschin]

On Wed, 19 Dec 2018 15:06:09 +0200
Priit Laes plaes at plaes.org wrote:

> From: Priit Laes <priit.laes@paf.com>
> 
> There are HDMI displays where hpd pin is not connected, thus
> we cannot get it to work unless we specifically set the resolution.
> 
> Rework the display probing, so hotplug detect failure causes
> fallback to probing ddc for EDID data.
> 
> Signed-off-by: Priit Laes <priit.laes@paf.com>
> ---
>  drivers/video/sunxi/sunxi_display.c | 28 +++++++++++++++++++++-------
>  1 file changed, 21 insertions(+), 7 deletions(-)

Applied to u-boot-video/master, thanks!

--
Anatolij