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From: Chris Packham <judge.packham@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 3/5] arm: mvebu: NAND clock support for MSYS devices
Date: Sat, 16 Feb 2019 11:49:00 +1300	[thread overview]
Message-ID: <20190215224902.28351-4-judge.packham@gmail.com> (raw)
In-Reply-To: <20190215224902.28351-1-judge.packham@gmail.com>

One difference with the integrated CPUs is that they use a different
clock control block to the Armada devices. Update mvebu_get_nand_clock()
accordingly.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
---
This could probably be squashed into the previous change. I was trying
to separate things to aid review but it's hard to do so and keep
bisectability.

Changes in v2: None

 arch/arm/mach-mvebu/cpu.c              |  2 ++
 arch/arm/mach-mvebu/include/mach/soc.h | 11 +++++++++++
 2 files changed, 13 insertions(+)

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 61b222a21070..5609ee2f9a3b 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -499,6 +499,8 @@ u32 mvebu_get_nand_clock(void)
 
 	if (mvebu_soc_family() == MVEBU_SOC_A38X)
 		reg = MVEBU_DFX_DIV_CLK_CTRL(1);
+	else if (mvebu_soc_family() == MVEBU_SOC_MSYS)
+		reg = MVEBU_DFX_DIV_CLK_CTRL(8);
 	else
 		reg = MVEBU_CORE_DIV_CLK_CTRL(1);
 
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 2d88c410b88c..f666ee24243b 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -100,9 +100,20 @@
 #define SPI_PUP_EN		BIT(5)
 
 #define MVEBU_CORE_DIV_CLK_CTRL(i)	(MVEBU_CLOCK_BASE + ((i) * 0x8))
+#ifdef CONFIG_ARMADA_MSYS
+#define MVEBU_DFX_DIV_CLK_CTRL(i)	(MVEBU_DFX_BASE + 0xf8000 + 0x250 + ((i) * 0x4))
+#define NAND_ECC_DIVCKL_RATIO_OFFS	6
+#define NAND_ECC_DIVCKL_RATIO_MASK	(0xF << NAND_ECC_DIVCKL_RATIO_OFFS)
+#else
 #define MVEBU_DFX_DIV_CLK_CTRL(i)	(MVEBU_DFX_BASE + 0x250 + ((i) * 0x4))
+#endif
+#ifdef CONFIG_ARMADA_MSYS
+#define NAND_ECC_DIVCKL_RATIO_OFFS	6
+#define NAND_ECC_DIVCKL_RATIO_MASK	(0xF << NAND_ECC_DIVCKL_RATIO_OFFS)
+#else
 #define NAND_ECC_DIVCKL_RATIO_OFFS	8
 #define NAND_ECC_DIVCKL_RATIO_MASK	(0x3F << NAND_ECC_DIVCKL_RATIO_OFFS)
+#endif
 
 #define SDRAM_MAX_CS		4
 #define SDRAM_ADDR_MASK		0xFF000000
-- 
2.20.1

  parent reply	other threads:[~2019-02-15 22:49 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-15 22:48 [U-Boot] [PATCH v2 0/5] Marvell DB-XC3-24G4XG board support Chris Packham
2019-02-15 22:48 ` [U-Boot] [PATCH v2 1/5] arm: sync armada-xp dts files from Linux 5.0 Chris Packham
2019-02-19  6:33   ` Stefan Roese
2019-04-11 11:50   ` Stefan Roese
2019-02-15 22:48 ` [U-Boot] [PATCH v2 2/5] arm: mvebu: Add Marvell's integrated CPUs Chris Packham
2019-02-19  6:34   ` Stefan Roese
2019-02-15 22:49 ` Chris Packham [this message]
2019-02-19  6:34   ` [U-Boot] [PATCH v2 3/5] arm: mvebu: NAND clock support for MSYS devices Stefan Roese
2019-02-15 22:49 ` [U-Boot] [PATCH v2 4/5] tools: kwbimage: don't adjust for image_header for Armada MSYS Chris Packham
2019-02-18  7:13   ` Stefan Roese
2019-02-18 22:23     ` Chris Packham
2019-02-19  6:18       ` Stefan Roese
2019-02-15 22:49 ` [U-Boot] [PATCH v2 5/5] arm: mvebu: Add DB-XC3-24G4XG board Chris Packham
2019-02-19  6:37   ` Stefan Roese
2019-04-11  6:45   ` Stefan Roese
2019-04-11  7:23     ` Chris Packham
2019-04-11  8:21       ` Chris Packham
2019-04-11  8:35         ` Stefan Roese
2019-04-11 10:16           ` Chris Packham

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