From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Date: Tue, 5 Mar 2019 13:03:53 -0600 Subject: [U-Boot] [RFC PATCHv1 0/3] misc: pl310: add a dm cache driver Message-ID: <20190305190356.9361-1-dinguyen@kernel.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello, I'm soliciting comments of this patchset. The patchset adds a driver for the cache controller(specifically the PL310). This cache controller can be found on many ARMv7 SoCs. I don't think it's used on ARMv8 platforms. This driver will retrieve the cache properties from the board DTS files and set the corresponding bits in cache controller. I think we can do something similar without make this driver and placing the file in /arch/arm/cpu/armv7, but wanted to get feedback. To-dos: - Add error checking - Add more cache properties Thanks, Dinh Nguyen (3): misc: pl310: add a misc driver for the pl310 cache controller defconfig: socfpga_sockit_defconfig: enable L2X0_CACHE driver ARM: socfpga: let the pl310 driver configure the cache settings arch/arm/include/asm/pl310.h | 3 ++ arch/arm/mach-socfpga/misc.c | 15 +----- configs/socfpga_sockit_defconfig | 2 + drivers/misc/Kconfig | 7 +++ drivers/misc/Makefile | 1 + drivers/misc/cache-l2x0.c | 84 ++++++++++++++++++++++++++++++++ 6 files changed, 99 insertions(+), 13 deletions(-) create mode 100644 drivers/misc/cache-l2x0.c -- 2.20.0