From: tien.fong.chee at intel.com <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v12 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL
Date: Tue, 19 Mar 2019 16:50:19 +0800 [thread overview]
Message-ID: <20190319085019.6647-10-tien.fong.chee@intel.com> (raw)
In-Reply-To: <20190319085019.6647-1-tien.fong.chee@intel.com>
From: Tien Fong Chee <tien.fong.chee@intel.com>
Increasing Malloc pool size up to 0x15000 is required to support FAT in SPL
. The result of calculation is come from after applying some few patches
which are required for optimizing vfat and maximizing resusable of the
memory pool, and then followed by the size required come from default max
cluster(0x10000) + others(0x2000) + additional memory for headroom(0x3000).
Previous records of describing these few patches can be checked from here
[v7]: https://www.mail-archive.com/u-boot at lists.denx.de/msg314511.html .
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
changes for v12
- Improved the commit messages.
changes for v11
- No changes.
changes for v10
- No changes.
changes for v9
- No changes.
changes for v8
- Moved the FIT related configs to the patch of configuration for FPGA
SoCFPGA A10 SoCDK.
changes for v7
- Keep minimal configs.
---
include/configs/socfpga_common.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 181af9b646..22533036ed 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright (C) 2012 Altera Corporation <www.altera.com>
+ * Copyright (C) 2012-2019 Altera Corporation <www.altera.com>
*/
#ifndef __CONFIG_SOCFPGA_COMMON_H__
#define __CONFIG_SOCFPGA_COMMON_H__
@@ -254,7 +254,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
/* SPL memory allocation configuration, this is for FAT implementation */
#ifndef CONFIG_SYS_SPL_MALLOC_START
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \
CONFIG_SYS_SPL_MALLOC_SIZE + \
CONFIG_SYS_INIT_RAM_ADDR)
--
2.13.0
next prev parent reply other threads:[~2019-03-19 8:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-19 8:50 [U-Boot] [PATCH v12 0/9] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 1/9] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 2/9] ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 3/9] ARM: socfpga: Cleaning up and ensuring consistent format messages in driver tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 4/9] ARM: socfpga: Moving the watchdog reset to the for-loop status polling tien.fong.chee at intel.com
2019-04-27 19:34 ` Simon Goldschmidt
2019-04-30 11:57 ` Chee, Tien Fong
2019-05-06 3:36 ` Chee, Tien Fong
2019-03-19 8:50 ` [U-Boot] [PATCH v12 5/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2019-04-27 19:57 ` Simon Goldschmidt
2019-04-30 12:09 ` Chee, Tien Fong
2019-04-30 12:24 ` Simon Goldschmidt
2019-05-02 7:49 ` Chee, Tien Fong
2019-05-03 11:26 ` Simon Goldschmidt
2019-05-06 3:36 ` Chee, Tien Fong
2019-05-06 7:14 ` Simon Goldschmidt
2019-03-19 8:50 ` [U-Boot] [PATCH v12 6/9] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 7/9] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 8/9] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` tien.fong.chee at intel.com [this message]
2019-04-27 19:50 ` [U-Boot] [PATCH v12 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL Simon Goldschmidt
2019-04-30 12:13 ` Chee, Tien Fong
2019-04-30 12:26 ` Simon Goldschmidt
2019-05-02 7:56 ` Chee, Tien Fong
2019-05-03 11:54 ` Simon Goldschmidt
2019-05-06 3:34 ` Chee, Tien Fong
2019-04-15 3:52 ` [U-Boot] [PATCH v12 0/9] Add support for loading FPGA bitstream Chee, Tien Fong
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