From: tien.fong.chee at intel.com <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v12 2/9] ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK
Date: Tue, 19 Mar 2019 16:50:12 +0800 [thread overview]
Message-ID: <20190319085019.6647-3-tien.fong.chee@intel.com> (raw)
In-Reply-To: <20190319085019.6647-1-tien.fong.chee@intel.com>
From: Tien Fong Chee <tien.fong.chee@intel.com>
Add default fitImage file bundling FPGA bitstreams for Arria10.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
changes for v12
- No changes.
changes for v11
- Replaced core image node "-2" with "-1",
the numeric associates the core and periph images in case where there
are multiple.
changes for v10
- Replaced both image nodes "@1" and "@2" with "-1" and "-2" respectively.
changes for v9
- Reordered the images and fpga configurations.
- Removed the load property at core image.
changes for v8
- Changed the FPGA node name to fpga-core and fpga-periph for both core and
periph bitstreams respectively.
changes for v7
- No changes.
---
board/altera/arria10-socdk/fit_spl_fpga.its | 38 +++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 board/altera/arria10-socdk/fit_spl_fpga.its
diff --git a/board/altera/arria10-socdk/fit_spl_fpga.its b/board/altera/arria10-socdk/fit_spl_fpga.its
new file mode 100644
index 0000000000..adae997213
--- /dev/null
+++ b/board/altera/arria10-socdk/fit_spl_fpga.its
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+ /*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ *
+ */
+
+/dts-v1/;
+
+/ {
+ description = "FIT image with FPGA bistream";
+ #address-cells = <1>;
+
+ images {
+ fpga-periph-1 {
+ description = "FPGA peripheral bitstream";
+ data = /incbin/("../../../ghrd_10as066n2.periph.rbf");
+ type = "fpga";
+ arch = "arm";
+ compression = "none";
+ };
+
+ fpga-core-1 {
+ description = "FPGA core bitstream";
+ data = /incbin/("../../../ghrd_10as066n2.core.rbf");
+ type = "fpga";
+ arch = "arm";
+ compression = "none";
+ };
+ };
+
+ configurations {
+ default = "config-1";
+ config-1 {
+ description = "Boot with FPGA early IO release config";
+ fpga = "fpga-periph-1", "fpga-core-1";
+ };
+ };
+};
--
2.13.0
next prev parent reply other threads:[~2019-03-19 8:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-19 8:50 [U-Boot] [PATCH v12 0/9] Add support for loading FPGA bitstream tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 1/9] ARM: socfpga: Description on FPGA bitstream type and file name for Arria 10 tien.fong.chee at intel.com
2019-03-19 8:50 ` tien.fong.chee at intel.com [this message]
2019-03-19 8:50 ` [U-Boot] [PATCH v12 3/9] ARM: socfpga: Cleaning up and ensuring consistent format messages in driver tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 4/9] ARM: socfpga: Moving the watchdog reset to the for-loop status polling tien.fong.chee at intel.com
2019-04-27 19:34 ` Simon Goldschmidt
2019-04-30 11:57 ` Chee, Tien Fong
2019-05-06 3:36 ` Chee, Tien Fong
2019-03-19 8:50 ` [U-Boot] [PATCH v12 5/9] ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading tien.fong.chee at intel.com
2019-04-27 19:57 ` Simon Goldschmidt
2019-04-30 12:09 ` Chee, Tien Fong
2019-04-30 12:24 ` Simon Goldschmidt
2019-05-02 7:49 ` Chee, Tien Fong
2019-05-03 11:26 ` Simon Goldschmidt
2019-05-06 3:36 ` Chee, Tien Fong
2019-05-06 7:14 ` Simon Goldschmidt
2019-03-19 8:50 ` [U-Boot] [PATCH v12 6/9] ARM: socfpga: Add the configuration for FPGA SoCFPGA A10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 7/9] spl : socfpga: Implement fpga bitstream loading with socfpga loadfs tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 8/9] ARM: socfpga: Synchronize the configuration for A10 SoCDK tien.fong.chee at intel.com
2019-03-19 8:50 ` [U-Boot] [PATCH v12 9/9] ARM: socfpga: Increase Malloc pool size to support FAT filesystem in SPL tien.fong.chee at intel.com
2019-04-27 19:50 ` Simon Goldschmidt
2019-04-30 12:13 ` Chee, Tien Fong
2019-04-30 12:26 ` Simon Goldschmidt
2019-05-02 7:56 ` Chee, Tien Fong
2019-05-03 11:54 ` Simon Goldschmidt
2019-05-06 3:34 ` Chee, Tien Fong
2019-04-15 3:52 ` [U-Boot] [PATCH v12 0/9] Add support for loading FPGA bitstream Chee, Tien Fong
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