From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Tue, 19 Mar 2019 16:56:26 +0100 Subject: [U-Boot] [PATCH 05/11] watchdog: at91sam9_wdt: Fix WDT setup in at91_wdt_start() In-Reply-To: <20190319155632.5680-1-sr@denx.de> References: <20190319155632.5680-1-sr@denx.de> Message-ID: <20190319155632.5680-5-sr@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: quoted-printable To: u-boot@lists.denx.de This patch fixes the timer register setup in at91_wdt_start() to correctly configure the register again. The input timeout value is now in milli-seconds instead of seconds with the new watchdog API. Make sure to take this into account and only use a max timeout value of 16 seconds as appropriate for this SoC. Also the check against a lower timeout value than 0 is removed. This check makes no sense, as the timeout value is unsigned. Signed-off-by: Stefan Roese Reported-by: Heiko Schocher Cc: Heiko Schocher Cc: Andreas Bie=C3=9Fmann Cc: Eugen Hristev --- drivers/watchdog/at91sam9_wdt.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wd= t.c index 13f8772e41..b0a3b4ed58 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -31,27 +32,30 @@ DECLARE_GLOBAL_DATA_PTR; #define WDT_SEC2TICKS(s) (((s) << 8) - 1) =20 /* Hardware timeout in seconds */ -#define WDT_MAX_TIMEOUT 16 -#define WDT_MIN_TIMEOUT 0 -#define WDT_DEFAULT_TIMEOUT 2 +#define WDT_MAX_TIMEOUT 16 +#define WDT_DEFAULT_TIMEOUT 2 =20 struct at91_wdt_priv { void __iomem *regs; - u32 regval; - u32 timeout; + u32 regval; + u32 timeout; }; =20 /* * Set the watchdog time interval in 1/256Hz (write-once) * Counter is 12 bit. */ -static int at91_wdt_start(struct udevice *dev, u64 timeout_s, ulong flags) +static int at91_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) { struct at91_wdt_priv *priv =3D dev_get_priv(dev); - u32 timeout =3D WDT_SEC2TICKS(timeout_s); + u64 timeout; + u32 ticks; =20 - if (timeout_s > WDT_MAX_TIMEOUT || timeout_s < WDT_MIN_TIMEOUT) - timeout =3D priv->timeout; + /* Calculate timeout in seconds and the resulting ticks */ + timeout =3D timeout_ms; + do_div(timeout, 1000); + timeout =3D min_t(u64, timeout, WDT_MAX_TIMEOUT); + ticks =3D WDT_SEC2TICKS(timeout); =20 /* Check if disabled */ if (readl(priv->regs + AT91_WDT_MR) & AT91_WDT_MR_WDDIS) { @@ -65,12 +69,10 @@ static int at91_wdt_start(struct udevice *dev, u64 time= out_s, ulong flags) * Since WDV is a 12-bit counter, the maximum period is * 4096 / 256 =3D 16 seconds. */ - priv->regval =3D AT91_WDT_MR_WDRSTEN /* causes watchdog reset */ | AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */ | AT91_WDT_MR_WDD(0xfff) /* restart at any time */ - | AT91_WDT_MR_WDV(timeout); /* timer value */ - + | AT91_WDT_MR_WDV(ticks); /* timer value */ writel(priv->regval, priv->regs + AT91_WDT_MR); =20 return 0; --=20 2.21.0