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From: Troy Benjegerdes <hozer@hozed.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/9] riscv: Add a SYSCON driver for Andestech's PLIC
Date: Thu, 21 Mar 2019 09:24:41 -0700	[thread overview]
Message-ID: <20190321162441.GD9699@bc.grid.coop> (raw)
In-Reply-To: <CAN5B=eJSo9SK+U6Gg9R4exxsYZoVRD+nSJ-DUyD6T-Dpu3KL2A@mail.gmail.com>

> > > >
> > > > Probably it makes more sense to put this to arch/riscv/cpu/ax25/Kconfig?
> > >
> > > I just refer to SIFIVE_CLINT. It also not make sense to place here, right ?
> >
> > Maybe, but since the cpu directory is renamed to 'generic', I am not
> > sure moving to that directory is a good idea.
> 
> Maybe I will still put it in /arch/riscv/Kconfig.
> And we can move them to the place they belong individually together if
> there have better place to accommodate to SIFIVE_CLINT.
> How do you think ?
> 



> > > > > +++ b/arch/riscv/lib/Makefile
> > > > > @@ -11,6 +11,7 @@ obj-$(CONFIG_CMD_GO) += boot.o
> > > > >  obj-y  += cache.o
> > > > >  obj-$(CONFIG_RISCV_RDTIME) += rdtime.o
> > > > >  obj-$(CONFIG_SIFIVE_CLINT) += sifive_clint.o
> > > > > +obj-$(CONFIG_NDS_PLIC) += nds_plic.o
> > > > >  obj-y  += interrupts.o
> > > > >  obj-y  += reset.o
> > > > >  obj-$(CONFIG_SBI_IPI) += sbi_ipi.o
> > > > > diff --git a/arch/riscv/lib/nds_plic.c b/arch/riscv/lib/nds_plic.c
> > > >
> > > > And move this driver to arch/riscv/cpu/ax25 since it's only available
> > > > in AX25 CPUs?
> > >
> > > Same as sifive_clint.c . Shall it also move away from /lib ?
> > >
> >
> > I agree, but see comments above :)


It seems to me there might be a usefull distinction between potentially 
generic things like the Sifive/Berkely/Rocket-chip clint [1] and other
vendor implementations which do not have necessarily have publicly 
reviewable hardware implementations.

[1] https://github.com/sifive/rocket-chip/blob/master/src/main/scala/devices/tilelink/CLINT.scala

  reply	other threads:[~2019-03-21 16:24 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-19  9:07 [U-Boot] [PATCH 0/9] AE350 SMP support RISC-V Andes
2019-03-19  9:07 ` [U-Boot] [PATCH 1/9] riscv: ax25: Create a simple-bus driver for the soc node Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  6:49     ` Rick Chen
2019-03-21  7:01       ` Bin Meng
2019-03-21  8:28         ` Rick Chen
2019-03-21  8:49           ` Bin Meng
2019-03-21  9:01             ` Rick Chen
2019-03-21  9:16               ` Bin Meng
2019-04-10  9:05                 ` Rick Chen
2019-04-10  9:21                   ` Auer, Lukas
2019-04-10  9:30                     ` Rick Chen
2019-03-19  9:07 ` [U-Boot] [PATCH 2/9] riscv: Add a SYSCON driver for Andestech's PLIC Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  7:04     ` Rick Chen
2019-03-21  7:32       ` Bin Meng
2019-03-21  8:39         ` Rick Chen
2019-03-21 16:24           ` Troy Benjegerdes [this message]
2019-03-19  9:07 ` [U-Boot] [PATCH 3/9] riscv: Add a SYSCON driver for Andestech's PLMT Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  8:41     ` Rick Chen
2019-03-19  9:07 ` [U-Boot] [PATCH 4/9] riscv: ae350: initialize PLIC Andes
2019-03-19  9:07 ` [U-Boot] [PATCH 5/9] riscv: ae350: disable ATCPIT100 timer Andes
2019-03-20  7:22   ` Bin Meng
2019-03-19  9:07 ` [U-Boot] [PATCH 6/9] riscv: ax25: Add platform-specific Kconfig options Andes
2019-03-20  7:22   ` Bin Meng
2019-03-19  9:07 ` [U-Boot] [PATCH 7/9] riscv: ax25: Andes specific cache shall only support in M-mode Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  8:42     ` Rick Chen
2019-03-19  9:07 ` [U-Boot] [PATCH 8/9] riscv: dts: ae350 support SMP Andes
2019-03-20  7:22   ` Bin Meng
2019-03-21  8:51     ` Rick Chen
2019-03-21  9:15       ` Bin Meng
2019-03-21  9:38         ` Rick Chen
2019-03-21 10:12           ` Bin Meng
2019-03-21 10:16             ` Rick Chen
2019-03-19  9:07 ` [U-Boot] [PATCH 9/9] riscv: ae350: enable SMP Andes
2019-03-20  7:22   ` Bin Meng

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