From: Thierry Reding <thierry.reding@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] ARM: tegra: Remove disp1 clock initialization on Tegra210
Date: Thu, 21 Mar 2019 18:14:22 +0100 [thread overview]
Message-ID: <20190321171422.22817-2-thierry.reding@gmail.com> (raw)
In-Reply-To: <20190321171422.22817-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
pll_c is not a valid parent for the disp1 clock, so trying to set it
will fail. Given that display is not used in U-Boot, remove the init
table entry so that disp1 will keep its default parent (clk_m).
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm/mach-tegra/tegra210/clock.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 0d7cafea2017..b240860f08cf 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
{ PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
- { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
--
2.21.0
prev parent reply other threads:[~2019-03-21 17:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-21 17:14 [U-Boot] [PATCH 1/2] ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210 Thierry Reding
2019-03-21 17:14 ` Thierry Reding [this message]
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