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From: Dinh Nguyen <dinguyen@kernel.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv4 2/6] ARM: pl310: Add macro's for handling tag and data latency mask
Date: Mon,  1 Apr 2019 17:32:16 -0500	[thread overview]
Message-ID: <20190401223220.3560-3-dinguyen@kernel.org> (raw)
In-Reply-To: <20190401223220.3560-1-dinguyen@kernel.org>

Add the PL310 macros for latency control setup, read and write bits.

Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
 arch/arm/include/asm/pl310.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index b83978b1cc..f69e9e45f8 100644
--- a/arch/arm/include/asm/pl310.h
+++ b/arch/arm/include/asm/pl310.h
@@ -18,6 +18,9 @@
 #define L310_SHARED_ATT_OVERRIDE_ENABLE		(1 << 22)
 #define L310_AUX_CTRL_DATA_PREFETCH_MASK	(1 << 28)
 #define L310_AUX_CTRL_INST_PREFETCH_MASK	(1 << 29)
+#define L310_LATENCY_CTRL_SETUP(n)		((n) << 0)
+#define L310_LATENCY_CTRL_RD(n)			((n) << 4)
+#define L310_LATENCY_CTRL_WR(n)			((n) << 8)
 
 #define L2X0_CACHE_ID_PART_MASK     (0xf << 6)
 #define L2X0_CACHE_ID_PART_L310     (3 << 6)
-- 
2.20.0

  parent reply	other threads:[~2019-04-01 22:32 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-01 22:32 [U-Boot] [PATCHv4 0/6] dm: cache: add dm cache driver Dinh Nguyen
2019-04-01 22:32 ` [U-Boot] [PATCHv4 1/6] Documentation: dts: Add pl310 cache controller dts documentation Dinh Nguyen
2019-04-01 22:32 ` Dinh Nguyen [this message]
2019-04-01 22:32 ` [U-Boot] [PATCHv4 3/6] dm: cache: Create a uclass for cache Dinh Nguyen
2019-04-22 17:48   ` [U-Boot] [U-Boot, PATCHv4, " Tom Rini
2019-04-23 21:23     ` Dinh Nguyen
2019-04-01 22:32 ` [U-Boot] [PATCHv4 4/6] dm: cache: add the pl310 cache controller driver Dinh Nguyen
2019-04-01 22:32 ` [U-Boot] [PATCHv4 5/6] ARM: socfpga: use the pl310 driver to configure the cache Dinh Nguyen
2019-04-01 22:32 ` [U-Boot] [PATCHv4 6/6] configs: socfpga: add imply pl310 cache controller Dinh Nguyen

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