From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Date: Mon, 1 Apr 2019 17:32:16 -0500 Subject: [U-Boot] [PATCHv4 2/6] ARM: pl310: Add macro's for handling tag and data latency mask In-Reply-To: <20190401223220.3560-1-dinguyen@kernel.org> References: <20190401223220.3560-1-dinguyen@kernel.org> Message-ID: <20190401223220.3560-3-dinguyen@kernel.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Add the PL310 macros for latency control setup, read and write bits. Reviewed-by: Marek Vasut Reviewed-by: Simon Glass Signed-off-by: Dinh Nguyen --- arch/arm/include/asm/pl310.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h index b83978b1cc..f69e9e45f8 100644 --- a/arch/arm/include/asm/pl310.h +++ b/arch/arm/include/asm/pl310.h @@ -18,6 +18,9 @@ #define L310_SHARED_ATT_OVERRIDE_ENABLE (1 << 22) #define L310_AUX_CTRL_DATA_PREFETCH_MASK (1 << 28) #define L310_AUX_CTRL_INST_PREFETCH_MASK (1 << 29) +#define L310_LATENCY_CTRL_SETUP(n) ((n) << 0) +#define L310_LATENCY_CTRL_RD(n) ((n) << 4) +#define L310_LATENCY_CTRL_WR(n) ((n) << 8) #define L2X0_CACHE_ID_PART_MASK (0xf << 6) #define L2X0_CACHE_ID_PART_L310 (3 << 6) -- 2.20.0