From mboxrd@z Thu Jan 1 00:00:00 1970 From: linux-kernel-dev at beckhoff.com Date: Wed, 17 Apr 2019 13:57:16 +0200 Subject: [U-Boot] [PATCH v1 3/6] arm: imx: add ipu to imx53.dts and set dm-pre-reloc In-Reply-To: <20190417115719.22407-1-linux-kernel-dev@beckhoff.com> References: <20190417115719.22407-1-linux-kernel-dev@beckhoff.com> Message-ID: <20190417115719.22407-4-linux-kernel-dev@beckhoff.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Steffen Dirkwinkel The ipu node in imx53 is needed for DM_VIDEO. We also need to set u-boot,dm-pre-reloc to initialize before relocation. Signed-off-by: Steffen Dirkwinkel --- arch/arm/dts/imx53.dtsi | 137 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 137 insertions(+) diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi index 0fd4acc6f53..7a47602b53d 100644 --- a/arch/arm/dts/imx53.dtsi +++ b/arch/arm/dts/imx53.dtsi @@ -31,6 +31,7 @@ i2c0 = &i2c1; i2c1 = &i2c2; i2c2 = &i2c3; + ipu0 = &ipu; mmc0 = &esdhc1; mmc1 = &esdhc2; mmc2 = &esdhc3; @@ -50,6 +51,7 @@ compatible = "simple-bus"; interrupt-parent = <&tzic>; ranges; + u-boot,dm-pre-reloc; aips at 50000000 { /* AIPS1 */ compatible = "fsl,aips-bus", "simple-bus"; @@ -273,5 +275,140 @@ status = "disabled"; }; }; + + ipu: ipu at 18000000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ipu"; + reg = <0x18000000 0x08000000>; + interrupts = <11 10>; + clocks = <&clks IMX5_CLK_IPU_GATE>, + <&clks IMX5_CLK_IPU_DI0_GATE>, + <&clks IMX5_CLK_IPU_DI1_GATE>; + clock-names = "bus", "di0", "di1"; + resets = <&src 2>; + u-boot,dm-pre-reloc; + + ipu_csi0: port at 0 { + reg = <0>; + }; + + ipu_csi1: port at 1 { + reg = <1>; + }; + + ipu_di0: port at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + + ipu_di0_disp0: endpoint at 0 { + reg = <0>; + }; + + ipu_di0_lvds0: endpoint at 1 { + reg = <1>; + remote-endpoint = <&lvds0_in>; + }; + }; + + ipu_di1: port at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + + ipu_di1_disp1: endpoint at 0 { + reg = <0>; + }; + + ipu_di1_lvds1: endpoint at 1 { + reg = <1>; + remote-endpoint = <&lvds1_in>; + }; + + ipu_di1_tve: endpoint at 2 { + reg = <2>; + remote-endpoint = <&tve_in>; + }; + }; + }; + + tve: tve at 63ff0000 { + compatible = "fsl,imx53-tve"; + reg = <0x63ff0000 0x1000>; + interrupts = <92>; + clocks = <&clks IMX5_CLK_TVE_GATE>, + <&clks IMX5_CLK_IPU_DI1_SEL>; + clock-names = "tve", "di_sel"; + status = "disabled"; + + port { + tve_in: endpoint { + remote-endpoint = <&ipu_di1_tve>; + }; + }; + }; + + src: src at 53fd0000 { + compatible = "fsl,imx53-src", "fsl,imx51-src"; + reg = <0x53fd0000 0x4000>; + #reset-cells = <1>; + }; + + ldb: ldb at 53fa8008 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ldb"; + reg = <0x53fa8008 0x4>; + gpr = <&gpr>; + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, + <&clks IMX5_CLK_LDB_DI1_SEL>, + <&clks IMX5_CLK_IPU_DI0_SEL>, + <&clks IMX5_CLK_IPU_DI1_SEL>, + <&clks IMX5_CLK_LDB_DI0_GATE>, + <&clks IMX5_CLK_LDB_DI1_GATE>; + clock-names = "di0_pll", "di1_pll", + "di0_sel", "di1_sel", + "di0", "di1"; + status = "disabled"; + + lvds-channel at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + status = "disabled"; + + port at 0 { + reg = <0>; + + lvds0_in: endpoint { + remote-endpoint = <&ipu_di0_lvds0>; + }; + }; + + port at 2 { + reg = <2>; + }; + }; + + lvds-channel at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + status = "disabled"; + + port at 1 { + reg = <1>; + + lvds1_in: endpoint { + remote-endpoint = <&ipu_di1_lvds1>; + }; + }; + + port at 2 { + reg = <2>; + }; + }; + }; }; }; -- 2.21.0