[U-Boot] [PATCH v3 0/3] Add Beelink GS1 Board

[U-Boot] [PATCH v3 0/3] Add Beelink GS1 Board

[Clément Péron]

This serie introduce the Beelink GS1 board with a patch for
the reset on Allwinner H6.

The first patch has been submitted but is still not merged.
But it's required for this series

Thanks to Jagan Teki most of the Beelink GS1 device-tree is
taken from the Orange Pi boards.

Changes with v2:
 - Add myself in sunxi MAINTAINERS file
 - Update with Jagan Teki's rsync patch
 - Change to complete DTS same as linux
 - Add linux sha1 to the commit log

Changes with v1:
 - Add bus-width for mmc2 node
 - Add sha1 in the sync dts commit

Clément Péron (2):
  arm: dts: h6: Add Beelink GS1 initial support
  arm: sunxi: h6: fix reset using r_wdog

Jagan Teki (1):
  arm64: allwinner: sun50i: Sync H6 dts(i) files from Linux

 arch/arm/dts/Makefile                         |   1 +
 arch/arm/dts/sun50i-h6-beelink-gs1.dts        | 260 ++++++++++++
 arch/arm/dts/sun50i-h6-orangepi.dtsi          |  62 ++-
 arch/arm/dts/sun50i-h6-pine-h64.dts           |  88 +++-
 arch/arm/dts/sun50i-h6.dtsi                   | 398 +++++++++++++++++-
 .../include/asm/arch-sunxi/cpu_sun50i_h6.h    |   1 +
 arch/arm/mach-sunxi/board.c                   |   9 +-
 board/sunxi/MAINTAINERS                       |   6 +
 configs/beelink_gs1_defconfig                 |  15 +
 include/dt-bindings/clock/sun8i-tcon-top.h    |  11 +
 10 files changed, 828 insertions(+), 23 deletions(-)
 create mode 100644 arch/arm/dts/sun50i-h6-beelink-gs1.dts
 create mode 100644 configs/beelink_gs1_defconfig
 create mode 100644 include/dt-bindings/clock/sun8i-tcon-top.h

-- 
2.17.1

[U-Boot] [PATCH v3 1/3] arm64: allwinner: sun50i: Sync H6 dts(i) files from Linux

[Clément Péron]

From: Jagan Teki <jagan@amarulasolutions.com>

Usually the Linux dts changes were synced in specific tags in Allwinner,
to keep track for whats been synced so-far and plan for future syncs.

But this patch sync sun50i-h6* dts(i) files from Linux w/o any specific
tag since these dts(i) changes are required for new H6 boards support.

Linux commit details about the sun50i-h6* sync:
"arm64: dts: allwinner: h6: move MMC pinctrl to dtsi"
(sha1: 6ba2e45d57afdfd982d12f168edd6a79a65075d8)

Linux commit details about the sun8i-tcon-top.h sync:
"dt-bindings: display: sunxi-drm: Add TCON TOP description"
(sha1: 59a9c39544cd1e5952c2a33028d71aa8180648f8)

Part of the sync initiated by 'Clément Péron'.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm/dts/sun50i-h6-orangepi.dtsi       |  62 +++-
 arch/arm/dts/sun50i-h6-pine-h64.dts        |  88 ++++-
 arch/arm/dts/sun50i-h6.dtsi                | 398 ++++++++++++++++++++-
 include/dt-bindings/clock/sun8i-tcon-top.h |  11 +
 4 files changed, 538 insertions(+), 21 deletions(-)
 create mode 100644 include/dt-bindings/clock/sun8i-tcon-top.h

diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi
index 0612c19cd9..62e27948a3 100644
--- a/arch/arm/dts/sun50i-h6-orangepi.dtsi
+++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi
@@ -21,17 +21,55 @@
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		power {
+			label = "orangepi:red:power";
+			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+			default-state = "on";
+		};
+
+		status {
+			label = "orangepi:green:status";
+			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
+		};
+	};
+
+	reg_vcc5v: vcc5v {
+		/* board wide 5V supply directly from the DC jack */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ehci3 {
+	status = "okay";
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins>;
 	vmmc-supply = <&reg_cldo1>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
 	bus-width = <4>;
 	status = "okay";
 };
 
+&ohci0 {
+	status = "okay";
+};
+
+&ohci3 {
+	status = "okay";
+};
+
 &r_i2c {
 	status = "okay";
 
@@ -43,6 +81,14 @@
 		interrupt-controller;
 		#interrupt-cells = <1>;
 		x-powers,self-working-mode;
+		vina-supply = <&reg_vcc5v>;
+		vinb-supply = <&reg_vcc5v>;
+		vinc-supply = <&reg_vcc5v>;
+		vind-supply = <&reg_vcc5v>;
+		vine-supply = <&reg_vcc5v>;
+		aldoin-supply = <&reg_vcc5v>;
+		bldoin-supply = <&reg_vcc5v>;
+		cldoin-supply = <&reg_vcc5v>;
 
 		regulators {
 			reg_aldo1: aldo1 {
@@ -148,3 +194,15 @@
 	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
+
+&usb2otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usb2phy {
+	usb0_id_det-gpios = <&pio 2 6 GPIO_ACTIVE_HIGH>; /* PC6 */
+	usb0_vbus-supply = <&reg_vcc5v>;
+	usb3_vbus-supply = <&reg_vcc5v>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
index ceffc40810..4802902e12 100644
--- a/arch/arm/dts/sun50i-h6-pine-h64.dts
+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
@@ -14,6 +14,7 @@
 	compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 	};
 
@@ -21,6 +22,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
@@ -39,23 +51,79 @@
 			gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
 		};
 	};
+
+	reg_usb_vbus: vbus {
+		compatible = "regulator-fixed";
+		regulator-name = "usb-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		startup-delay-us = <100000>;
+		gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
 };
 
-&mmc0 {
+&emac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins>;
+	pinctrl-0 = <&ext_rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_aldo2>;
+	allwinner,rx-delay-ps = <200>;
+	allwinner,tx-delay-ps = <200>;
+	status = "okay";
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
+&de {
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&ehci3 {
+	status = "okay";
+};
+
+&mmc0 {
 	vmmc-supply = <&reg_cldo1>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
 	status = "okay";
 };
 
 &mmc2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins>;
 	vmmc-supply = <&reg_cldo1>;
 	vqmmc-supply = <&reg_bldo2>;
 	non-removable;
 	cap-mmc-hw-reset;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&ohci3 {
 	status = "okay";
 };
 
@@ -83,6 +151,7 @@
 				regulator-min-microvolt = <3300000>;
 				regulator-max-microvolt = <3300000>;
 				regulator-name = "vcc-ac200";
+				regulator-enable-ramp-delay = <100000>;
 			};
 
 			reg_aldo3: aldo3 {
@@ -183,3 +252,14 @@
 	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
+
+&usb2otg {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usb2phy {
+	usb0_vbus-supply = <&reg_usb_vbus>;
+	usb3_vbus-supply = <&reg_usb_vbus>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
index cfa5fffcf6..e0dc4a05c1 100644
--- a/arch/arm/dts/sun50i-h6.dtsi
+++ b/arch/arm/dts/sun50i-h6.dtsi
@@ -6,8 +6,11 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/sun50i-h6-ccu.h>
 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
+#include <dt-bindings/clock/sun8i-de2.h>
+#include <dt-bindings/clock/sun8i-tcon-top.h>
 #include <dt-bindings/reset/sun50i-h6-ccu.h>
 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+#include <dt-bindings/reset/sun8i-de2.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -19,34 +22,40 @@
 		#size-cells = <0>;
 
 		cpu0: cpu at 0 {
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			reg = <0>;
 			enable-method = "psci";
 		};
 
 		cpu1: cpu at 1 {
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			reg = <1>;
 			enable-method = "psci";
 		};
 
 		cpu2: cpu at 2 {
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			reg = <2>;
 			enable-method = "psci";
 		};
 
 		cpu3: cpu at 3 {
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			device_type = "cpu";
 			reg = <3>;
 			enable-method = "psci";
 		};
 	};
 
+	de: display-engine {
+		compatible = "allwinner,sun50i-h6-display-engine";
+		allwinner,pipelines = <&mixer0>;
+		status = "disabled";
+	};
+
 	iosc: internal-osc-clk {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
@@ -92,6 +101,99 @@
 		#size-cells = <1>;
 		ranges;
 
+		display-engine at 1000000 {
+			compatible = "allwinner,sun50i-h6-de3",
+				     "allwinner,sun50i-a64-de2";
+			reg = <0x1000000 0x400000>;
+			allwinner,sram = <&de2_sram 1>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x1000000 0x400000>;
+
+			display_clocks: clock at 0 {
+				compatible = "allwinner,sun50i-h6-de3-clk";
+				reg = <0x0 0x10000>;
+				clocks = <&ccu CLK_DE>,
+					 <&ccu CLK_BUS_DE>;
+				clock-names = "mod",
+					      "bus";
+				resets = <&ccu RST_BUS_DE>;
+				#clock-cells = <1>;
+				#reset-cells = <1>;
+			};
+
+			mixer0: mixer at 100000 {
+				compatible = "allwinner,sun50i-h6-de3-mixer-0";
+				reg = <0x100000 0x100000>;
+				clocks = <&display_clocks CLK_BUS_MIXER0>,
+					 <&display_clocks CLK_MIXER0>;
+				clock-names = "bus",
+					      "mod";
+				resets = <&display_clocks RST_MIXER0>;
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					mixer0_out: port at 1 {
+						reg = <1>;
+
+						mixer0_out_tcon_top_mixer0: endpoint {
+							remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
+						};
+					};
+				};
+			};
+		};
+
+		video-codec at 1c0e000 {
+			compatible = "allwinner,sun50i-h6-video-engine";
+			reg = <0x01c0e000 0x2000>;
+			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+				 <&ccu CLK_MBUS_VE>;
+			clock-names = "ahb", "mod", "ram";
+			resets = <&ccu RST_BUS_VE>;
+			interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+			allwinner,sram = <&ve_sram 1>;
+		};
+
+		syscon: syscon at 3000000 {
+			compatible = "allwinner,sun50i-h6-system-control",
+				     "allwinner,sun50i-a64-system-control";
+			reg = <0x03000000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			sram_c: sram at 28000 {
+				compatible = "mmio-sram";
+				reg = <0x00028000 0x1e000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x00028000 0x1e000>;
+
+				de2_sram: sram-section at 0 {
+					compatible = "allwinner,sun50i-h6-sram-c",
+						     "allwinner,sun50i-a64-sram-c";
+					reg = <0x0000 0x1e000>;
+				};
+			};
+
+			sram_c1: sram at 1a00000 {
+				compatible = "mmio-sram";
+				reg = <0x01a00000 0x200000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x01a00000 0x200000>;
+
+				ve_sram: sram-section at 0 {
+					compatible = "allwinner,sun50i-h6-sram-c1",
+						     "allwinner,sun4i-a10-sram-c1";
+					reg = <0x000000 0x200000>;
+				};
+			};
+		};
+
 		ccu: clock at 3001000 {
 			compatible = "allwinner,sun50i-h6-ccu";
 			reg = <0x03001000 0x1000>;
@@ -101,15 +203,9 @@
 			#reset-cells = <1>;
 		};
 
-		gic: interrupt-controller at 3021000 {
-			compatible = "arm,gic-400";
-			reg = <0x03021000 0x1000>,
-			      <0x03022000 0x2000>,
-			      <0x03024000 0x2000>,
-			      <0x03026000 0x2000>;
-			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-			interrupt-controller;
-			#interrupt-cells = <3>;
+		sid: sid at 3006000 {
+			compatible = "allwinner,sun50i-h6-sid";
+			reg = <0x03006000 0x400>;
 		};
 
 		pio: pinctrl at 300b000 {
@@ -126,6 +222,19 @@
 			interrupt-controller;
 			#interrupt-cells = <3>;
 
+			ext_rgmii_pins: rgmii-pins {
+				pins = "PD0", "PD1", "PD2", "PD3", "PD4",
+				       "PD5", "PD7", "PD8", "PD9", "PD10",
+				       "PD11", "PD12", "PD13", "PD19", "PD20";
+				function = "emac";
+				drive-strength = <40>;
+			};
+
+			hdmi_pins: hdmi-pins {
+				pins = "PH8", "PH9", "PH10";
+				function = "hdmi";
+			};
+
 			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2", "PF3",
 				       "PF4", "PF5";
@@ -143,12 +252,23 @@
 				bias-pull-up;
 			};
 
-			uart0_ph_pins: uart0-ph {
+			uart0_ph_pins: uart0-ph-pins {
 				pins = "PH0", "PH1";
 				function = "uart0";
 			};
 		};
 
+		gic: interrupt-controller at 3021000 {
+			compatible = "arm,gic-400";
+			reg = <0x03021000 0x1000>,
+			      <0x03022000 0x2000>,
+			      <0x03024000 0x2000>,
+			      <0x03026000 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+
 		mmc0: mmc at 4020000 {
 			compatible = "allwinner,sun50i-h6-mmc",
 				     "allwinner,sun50i-a64-mmc";
@@ -158,6 +278,8 @@
 			resets = <&ccu RST_BUS_MMC0>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -186,6 +308,8 @@
 			resets = <&ccu RST_BUS_MMC2>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc2_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -235,6 +359,250 @@
 			status = "disabled";
 		};
 
+		emac: ethernet at 5020000 {
+			compatible = "allwinner,sun50i-h6-emac",
+				     "allwinner,sun50i-a64-emac";
+			syscon = <&syscon>;
+			reg = <0x05020000 0x10000>;
+			interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			resets = <&ccu RST_BUS_EMAC>;
+			reset-names = "stmmaceth";
+			clocks = <&ccu CLK_BUS_EMAC>;
+			clock-names = "stmmaceth";
+			status = "disabled";
+
+			mdio: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
+		usb2otg: usb at 5100000 {
+			compatible = "allwinner,sun50i-h6-musb",
+				     "allwinner,sun8i-a33-musb";
+			reg = <0x05100000 0x0400>;
+			clocks = <&ccu CLK_BUS_OTG>;
+			resets = <&ccu RST_BUS_OTG>;
+			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "mc";
+			phys = <&usb2phy 0>;
+			phy-names = "usb";
+			extcon = <&usb2phy 0>;
+			status = "disabled";
+		};
+
+		usb2phy: phy at 5100400 {
+			compatible = "allwinner,sun50i-h6-usb-phy";
+			reg = <0x05100400 0x24>,
+			      <0x05101800 0x4>,
+			      <0x05311800 0x4>;
+			reg-names = "phy_ctrl",
+				    "pmu0",
+				    "pmu3";
+			clocks = <&ccu CLK_USB_PHY0>,
+				 <&ccu CLK_USB_PHY3>;
+			clock-names = "usb0_phy",
+				      "usb3_phy";
+			resets = <&ccu RST_USB_PHY0>,
+				 <&ccu RST_USB_PHY3>;
+			reset-names = "usb0_reset",
+				      "usb3_reset";
+			status = "disabled";
+			#phy-cells = <1>;
+		};
+
+		ehci0: usb at 5101000 {
+			compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
+			reg = <0x05101000 0x100>;
+			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI0>,
+				 <&ccu CLK_BUS_EHCI0>,
+				 <&ccu CLK_USB_OHCI0>;
+			resets = <&ccu RST_BUS_OHCI0>,
+				 <&ccu RST_BUS_EHCI0>;
+			status = "disabled";
+		};
+
+		ohci0: usb at 5101400 {
+			compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
+			reg = <0x05101400 0x100>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI0>,
+				 <&ccu CLK_USB_OHCI0>;
+			resets = <&ccu RST_BUS_OHCI0>;
+			status = "disabled";
+		};
+
+		ehci3: usb at 5311000 {
+			compatible = "allwinner,sun50i-h6-ehci", "generic-ehci";
+			reg = <0x05311000 0x100>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI3>,
+				 <&ccu CLK_BUS_EHCI3>,
+				 <&ccu CLK_USB_OHCI3>;
+			resets = <&ccu RST_BUS_OHCI3>,
+				 <&ccu RST_BUS_EHCI3>;
+			phys = <&usb2phy 3>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
+		ohci3: usb at 5311400 {
+			compatible = "allwinner,sun50i-h6-ohci", "generic-ohci";
+			reg = <0x05311400 0x100>;
+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_OHCI3>,
+				 <&ccu CLK_USB_OHCI3>;
+			resets = <&ccu RST_BUS_OHCI3>;
+			phys = <&usb2phy 3>;
+			phy-names = "usb";
+			status = "disabled";
+		};
+
+		hdmi: hdmi at 6000000 {
+			compatible = "allwinner,sun50i-h6-dw-hdmi";
+			reg = <0x06000000 0x10000>;
+			reg-io-width = <1>;
+			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
+				 <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
+				 <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
+			clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
+				      "hdcp-bus";
+			resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
+			reset-names = "ctrl", "hdcp";
+			phys = <&hdmi_phy>;
+			phy-names = "hdmi-phy";
+			pinctrl-names = "default";
+			pinctrl-0 = <&hdmi_pins>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				hdmi_in: port at 0 {
+					reg = <0>;
+
+					hdmi_in_tcon_top: endpoint {
+						remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
+					};
+				};
+
+				hdmi_out: port at 1 {
+					reg = <1>;
+				};
+			};
+		};
+
+		hdmi_phy: hdmi-phy at 6010000 {
+			compatible = "allwinner,sun50i-h6-hdmi-phy";
+			reg = <0x06010000 0x10000>;
+			clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>;
+			clock-names = "bus", "mod";
+			resets = <&ccu RST_BUS_HDMI>;
+			reset-names = "phy";
+			#phy-cells = <0>;
+		};
+
+		tcon_top: tcon-top at 6510000 {
+			compatible = "allwinner,sun50i-h6-tcon-top";
+			reg = <0x06510000 0x1000>;
+			clocks = <&ccu CLK_BUS_TCON_TOP>,
+				 <&ccu CLK_TCON_TV0>;
+			clock-names = "bus",
+				      "tcon-tv0";
+			clock-output-names = "tcon-top-tv0";
+			resets = <&ccu RST_BUS_TCON_TOP>;
+			reset-names = "rst";
+			#clock-cells = <1>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				tcon_top_mixer0_in: port at 0 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <0>;
+
+					tcon_top_mixer0_in_mixer0: endpoint at 0 {
+						reg = <0>;
+						remote-endpoint = <&mixer0_out_tcon_top_mixer0>;
+					};
+				};
+
+				tcon_top_mixer0_out: port at 1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>;
+
+					tcon_top_mixer0_out_tcon_tv: endpoint at 2 {
+						reg = <2>;
+						remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>;
+					};
+				};
+
+				tcon_top_hdmi_in: port at 4 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <4>;
+
+					tcon_top_hdmi_in_tcon_tv: endpoint at 0 {
+						reg = <0>;
+						remote-endpoint = <&tcon_tv_out_tcon_top>;
+					};
+				};
+
+				tcon_top_hdmi_out: port at 5 {
+					reg = <5>;
+
+					tcon_top_hdmi_out_hdmi: endpoint {
+						remote-endpoint = <&hdmi_in_tcon_top>;
+					};
+				};
+			};
+		};
+
+		tcon_tv: lcd-controller at 6515000 {
+			compatible = "allwinner,sun50i-h6-tcon-tv",
+				     "allwinner,sun8i-r40-tcon-tv";
+			reg = <0x06515000 0x1000>;
+			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_TCON_TV0>,
+				 <&tcon_top CLK_TCON_TOP_TV0>;
+			clock-names = "ahb",
+				      "tcon-ch1";
+			resets = <&ccu RST_BUS_TCON_TV0>;
+			reset-names = "lcd";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				tcon_tv_in: port at 0 {
+					reg = <0>;
+
+					tcon_tv_in_tcon_top_mixer0: endpoint {
+						remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>;
+					};
+				};
+
+				tcon_tv_out: port at 1 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <1>;
+
+					tcon_tv_out_tcon_top: endpoint at 1 {
+						reg = <1>;
+						remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>;
+					};
+				};
+			};
+		};
+
 		r_ccu: clock at 7010000 {
 			compatible = "allwinner,sun50i-h6-r-ccu";
 			reg = <0x07010000 0x400>;
@@ -266,7 +634,7 @@
 			interrupt-controller;
 			#interrupt-cells = <3>;
 
-			r_i2c_pins: r-i2c {
+			r_i2c_pins: r-i2c-pins {
 				pins = "PL0", "PL1";
 				function = "s_i2c";
 			};
diff --git a/include/dt-bindings/clock/sun8i-tcon-top.h b/include/dt-bindings/clock/sun8i-tcon-top.h
new file mode 100644
index 0000000000..25164d7678
--- /dev/null
+++ b/include/dt-bindings/clock/sun8i-tcon-top.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
+/* Copyright (C) 2018 Jernej Skrabec <jernej.skrabec@siol.net> */
+
+#ifndef _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_
+#define _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_
+
+#define CLK_TCON_TOP_TV0	0
+#define CLK_TCON_TOP_TV1	1
+#define CLK_TCON_TOP_DSI	2
+
+#endif /* _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_ */
-- 
2.17.1

[U-Boot] [PATCH v3 2/3] arm: dts: h6: Add Beelink GS1 initial support

[Clément Péron]

Beelink GS1 is an Allwinner H6 based TV box,
which support:
- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
- GPU Mali-T720
- 2GB LPDDR3 RAM
- 16GB eMMC
- AXP805 PMIC
- 1Gbps GMAC via RTL8211E
- USB 2.0 and 3.0 Host
- HDMI port
- S/PDIF port
- 5V/2A DC power supply
- Wi-Fi/BT via Fn-Link 6222B-SRB (RTL8222BS)

Introduced in Linux with commit :
089bee8dd119 arm64: dts: allwinner: h6: Introduce Beelink GS1 board

Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 arch/arm/dts/Makefile                  |   1 +
 arch/arm/dts/sun50i-h6-beelink-gs1.dts | 260 +++++++++++++++++++++++++
 board/sunxi/MAINTAINERS                |   6 +
 configs/beelink_gs1_defconfig          |  15 ++
 4 files changed, 282 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-h6-beelink-gs1.dts
 create mode 100644 configs/beelink_gs1_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0aee8dfde0..4bba8b81f8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -469,6 +469,7 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
 	sun50i-h5-orangepi-prime.dtb \
 	sun50i-h5-orangepi-zero-plus2.dtb
 dtb-$(CONFIG_MACH_SUN50I_H6) += \
+	sun50i-h6-beelink-gs1.dtb \
 	sun50i-h6-orangepi-lite2.dtb \
 	sun50i-h6-orangepi-one-plus.dtb \
 	sun50i-h6-pine-h64.dtb
diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
new file mode 100644
index 0000000000..0dc33c90dd
--- /dev/null
+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
@@ -0,0 +1,260 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2019 Clément Péron <peron.clem@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "sun50i-h6.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Beelink GS1";
+	compatible = "azw,beelink-gs1", "allwinner,sun50i-h6";
+
+	aliases {
+		ethernet0 = &emac;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con_in: endpoint {
+				remote-endpoint = <&hdmi_out_con>;
+			};
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		power {
+			label = "beelink:white:power";
+			gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+			default-state = "on";
+		};
+	};
+
+	reg_vcc5v: vcc5v {
+		/* board wide 5V supply directly from the DC jack */
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-5v";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+	};
+};
+
+&de {
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ext_rgmii_pins>;
+	phy-mode = "rgmii";
+	phy-handle = <&ext_rgmii_phy>;
+	phy-supply = <&reg_aldo2>;
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&hdmi_out {
+	hdmi_out_con: endpoint {
+		remote-endpoint = <&hdmi_con_in>;
+	};
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy at 1 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <1>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_cldo1>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&mmc2 {
+	vmmc-supply = <&reg_cldo1>;
+	vqmmc-supply = <&reg_bldo2>;
+	non-removable;
+	cap-mmc-hw-reset;
+	bus-width = <8>;
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&pio {
+	vcc-pd-supply = <&reg_cldo1>;
+	vcc-pg-supply = <&reg_aldo1>;
+};
+
+&r_i2c {
+	status = "okay";
+
+	axp805: pmic at 36 {
+		compatible = "x-powers,axp805", "x-powers,axp806";
+		reg = <0x36>;
+		interrupt-parent = <&r_intc>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		x-powers,self-working-mode;
+		vina-supply = <&reg_vcc5v>;
+		vinb-supply = <&reg_vcc5v>;
+		vinc-supply = <&reg_vcc5v>;
+		vind-supply = <&reg_vcc5v>;
+		vine-supply = <&reg_vcc5v>;
+		aldoin-supply = <&reg_vcc5v>;
+		bldoin-supply = <&reg_vcc5v>;
+		cldoin-supply = <&reg_vcc5v>;
+
+		regulators {
+			reg_aldo1: aldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-pl";
+			};
+
+			reg_aldo2: aldo2 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-ac200";
+				regulator-enable-ramp-delay = <100000>;
+			};
+
+			reg_aldo3: aldo3 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc25-dram";
+			};
+
+			reg_bldo1: bldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-bias-pll";
+			};
+
+			reg_bldo2: bldo2 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-efuse-pcie-hdmi-io";
+			};
+
+			reg_bldo3: bldo3 {
+				regulator-always-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc-dcxoio";
+			};
+
+			bldo4 {
+				/* unused */
+			};
+
+			reg_cldo1: cldo1 {
+				regulator-always-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-3v3";
+			};
+
+			reg_cldo2: cldo2 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-wifi-1";
+			};
+
+			reg_cldo3: cldo3 {
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc-wifi-2";
+			};
+
+			reg_dcdca: dcdca {
+				regulator-always-on;
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <1080000>;
+				regulator-name = "vdd-cpu";
+			};
+
+			reg_dcdcc: dcdcc {
+				regulator-min-microvolt = <810000>;
+				regulator-max-microvolt = <1080000>;
+				regulator-name = "vdd-gpu";
+			};
+
+			reg_dcdcd: dcdcd {
+				regulator-always-on;
+				regulator-min-microvolt = <960000>;
+				regulator-max-microvolt = <960000>;
+				regulator-name = "vdd-sys";
+			};
+
+			reg_dcdce: dcdce {
+				regulator-always-on;
+				regulator-min-microvolt = <1200000>;
+				regulator-max-microvolt = <1200000>;
+				regulator-name = "vcc-dram";
+			};
+
+			sw {
+				/* unused */
+			};
+		};
+	};
+};
+
+&r_pio {
+	/*
+	 * PL0 and PL1 are used for PMIC I2C
+	 * don't enable the pl-supply else
+	 * it will fail at boot
+	 *
+	 * vcc-pl-supply = <&reg_aldo1>;
+	 */
+	vcc-pm-supply = <&reg_aldo1>;
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_ph_pins>;
+	status = "okay";
+};
+
+&usb2otg {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usb2phy {
+	usb0_vbus-supply = <&reg_vcc5v>;
+	status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index 338f374e56..03153f7252 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -166,6 +166,12 @@ M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
 F:	configs/bananapi_m64_defconfig
 
+BEELINK GS1
+M:	Clément Péron <peron.clem@gmail.com>
+S:	Maintained
+F:	configs/beelink_gs1_defconfig
+F:	arch/arm/dts/sun50i-h6-beelink-gs1.dts
+
 COLOMBUS BOARD
 M:	Maxime Ripard <maxime.ripard@bootlin.com>
 S:	Maintained
diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig
new file mode 100644
index 0000000000..ef4dd29549
--- /dev/null
+++ b/configs/beelink_gs1_defconfig
@@ -0,0 +1,15 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I_H6=y
+CONFIG_MMC0_CD_PIN="PF6"
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+# CONFIG_PSCI_RESET is not set
+CONFIG_NR_DRAM_BANKS=1
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-beelink-gs1"
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
-- 
2.17.1

[U-Boot] [PATCH v3 2/3] arm: dts: h6: Add Beelink GS1 initial support

[Jagan Teki]

On Wed, Apr 17, 2019 at 11:11 PM Clément Péron <peron.clem@gmail.com> wrote:
>
> Beelink GS1 is an Allwinner H6 based TV box,
> which support:
> - Allwinner H6 Quad-core 64-bit ARM Cortex-A53
> - GPU Mali-T720
> - 2GB LPDDR3 RAM
> - 16GB eMMC
> - AXP805 PMIC
> - 1Gbps GMAC via RTL8211E
> - USB 2.0 and 3.0 Host
> - HDMI port
> - S/PDIF port
> - 5V/2A DC power supply
> - Wi-Fi/BT via Fn-Link 6222B-SRB (RTL8222BS)
>
> Introduced in Linux with commit :
> 089bee8dd119 arm64: dts: allwinner: h6: Introduce Beelink GS1 board
>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
> ---

With simple edit on commit message and

Applied to u-boot-sunxi/master

[U-Boot] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Clément Péron]

WDOG is broken for some H6 rev. The board is not
reseted correctly.

Use the R_WDOG instead.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 1 +
 arch/arm/mach-sunxi/board.c                     | 9 +++++++--
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
index 41a9b0fc47..6392cb07b4 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
@@ -60,6 +60,7 @@
 #define SUNXI_RTC_BASE			0x07000000
 #define SUNXI_R_CPUCFG_BASE		0x07000400
 #define SUNXI_PRCM_BASE			0x07010000
+#define SUNXI_R_WDOG_BASE		0x07020400
 #define SUNXI_R_PIO_BASE		0x07022000
 #define SUNXI_R_UART_BASE		0x07080000
 #define SUNXI_R_TWI_BASE		0x07081400
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index c6dd7b8e54..921e4c5175 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -289,9 +289,14 @@ void reset_cpu(ulong addr)
 		writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
 	}
 #elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
+#if defined(CONFIG_MACH_SUN50I_H6)
+	/* WDOG is broken for some H6 rev. use the R_WDOG instead */
 	static const struct sunxi_wdog *wdog =
-		 ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
-
+		(struct sunxi_wdog *)SUNXI_R_WDOG_BASE;
+#else
+	static const struct sunxi_wdog *wdog =
+		((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
+#endif
 	/* Set the watchdog for its shortest interval (.5s) and wait */
 	writel(WDT_CFG_RESET, &wdog->cfg);
 	writel(WDT_MODE_EN, &wdog->mode);
-- 
2.17.1

[U-Boot] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Clément Péron]

Hi,

+Chen-Yu Tsai for test and +Icenowy because she try to contact AW
about this issue.

On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
>
> WDOG is broken for some H6 rev. The board is not
> reseted correctly.
>
> Use the R_WDOG instead.

The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
be NOT affected.
Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
complaining about this issue.

We perform a simple watchdog test on different board :

Chen-Yu Tsai :
Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO

Martin Ayotte :
PineH64 = H8069BA 6892 => OK
Orange Pi 3 = HA047BA 69W2 => KO
OPiOnePlus = H7310BA 6842 => KO
OPiLite2 = H6448BA 6662 => KO

Clément Péron:
Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO

After the series of result, Icenowy try to reach Allwinner about this
issue but they seems not interested to investigate it.

I'm not sure if it's an HW errata or if there something misconfigured
but the result is here WDOG doesn't make these boards reboot.
And this should not happens !

As we don't have the ARIS co proc to do power management and watchdog
is the only solution to reset the board for now.
A really simple change from Watchdog to R_Watchdog fix the issue and
has been tested on several boards.
Patch is already applied on Armbian.

Thanks,
Clément

>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
> ---
>  arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 1 +
>  arch/arm/mach-sunxi/board.c                     | 9 +++++++--
>  2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
> index 41a9b0fc47..6392cb07b4 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
> @@ -60,6 +60,7 @@
>  #define SUNXI_RTC_BASE                 0x07000000
>  #define SUNXI_R_CPUCFG_BASE            0x07000400
>  #define SUNXI_PRCM_BASE                        0x07010000
> +#define SUNXI_R_WDOG_BASE              0x07020400
>  #define SUNXI_R_PIO_BASE               0x07022000
>  #define SUNXI_R_UART_BASE              0x07080000
>  #define SUNXI_R_TWI_BASE               0x07081400
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index c6dd7b8e54..921e4c5175 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -289,9 +289,14 @@ void reset_cpu(ulong addr)
>                 writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
>         }
>  #elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6)
> +#if defined(CONFIG_MACH_SUN50I_H6)
> +       /* WDOG is broken for some H6 rev. use the R_WDOG instead */
>         static const struct sunxi_wdog *wdog =
> -                ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
> -
> +               (struct sunxi_wdog *)SUNXI_R_WDOG_BASE;
> +#else
> +       static const struct sunxi_wdog *wdog =
> +               ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
> +#endif
>         /* Set the watchdog for its shortest interval (.5s) and wait */
>         writel(WDT_CFG_RESET, &wdog->cfg);
>         writel(WDT_MODE_EN, &wdog->mode);
> --
> 2.17.1
>

[U-Boot] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Jagan Teki]

On Fri, Apr 19, 2019 at 1:23 PM Clément Péron <peron.clem@gmail.com> wrote:
>
> Hi,
>
> +Chen-Yu Tsai for test and +Icenowy because she try to contact AW
> about this issue.
>
> On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
> >
> > WDOG is broken for some H6 rev. The board is not
> > reseted correctly.
> >
> > Use the R_WDOG instead.
>
> The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
> be NOT affected.
> Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
> complaining about this issue.
>
> We perform a simple watchdog test on different board :
>
> Chen-Yu Tsai :
> Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
> OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
>
> Martin Ayotte :
> PineH64 = H8069BA 6892 => OK
> Orange Pi 3 = HA047BA 69W2 => KO
> OPiOnePlus = H7310BA 6842 => KO
> OPiLite2 = H6448BA 6662 => KO
>
> Clément Péron:
> Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
>
> After the series of result, Icenowy try to reach Allwinner about this
> issue but they seems not interested to investigate it.
>
> I'm not sure if it's an HW errata or if there something misconfigured
> but the result is here WDOG doesn't make these boards reboot.
> And this should not happens !

How about Linux? same issue.

[U-Boot] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Clément Péron]

Hi,

On Fri, 19 Apr 2019 at 10:24, Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> On Fri, Apr 19, 2019 at 1:23 PM Clément Péron <peron.clem@gmail.com> wrote:
> >
> > Hi,
> >
> > +Chen-Yu Tsai for test and +Icenowy because she try to contact AW
> > about this issue.
> >
> > On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
> > >
> > > WDOG is broken for some H6 rev. The board is not
> > > reseted correctly.
> > >
> > > Use the R_WDOG instead.
> >
> > The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
> > be NOT affected.
> > Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
> > complaining about this issue.
> >
> > We perform a simple watchdog test on different board :
> >
> > Chen-Yu Tsai :
> > Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
> > OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
> >
> > Martin Ayotte :
> > PineH64 = H8069BA 6892 => OK
> > Orange Pi 3 = HA047BA 69W2 => KO
> > OPiOnePlus = H7310BA 6842 => KO
> > OPiLite2 = H6448BA 6662 => KO
> >
> > Clément Péron:
> > Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
> >
> > After the series of result, Icenowy try to reach Allwinner about this
> > issue but they seems not interested to investigate it.
> >
> > I'm not sure if it's an HW errata or if there something misconfigured
> > but the result is here WDOG doesn't make these boards reboot.
> > And this should not happens !
>
> How about Linux? same issue.
Yes, Linux use PSCI, call ATF and we have the same issue as ATF use
the watchdog to reboot.

Clement

[U-Boot] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Clément Péron]

Hi Jagan,

FYI the patch on ATF has been merged just now. It has been tested by
André Przywara on A64, H5 and H6.

https://github.com/ARM-software/arm-trusted-firmware/commit/523ab5be1a84e9aa15fb62c3a15a6338b01d3961

Thanks,
Clement

On Fri, 19 Apr 2019 at 11:19, Clément Péron <peron.clem@gmail.com> wrote:
>
> Hi,
>
> On Fri, 19 Apr 2019 at 10:24, Jagan Teki <jagan@amarulasolutions.com> wrote:
> >
> > On Fri, Apr 19, 2019 at 1:23 PM Clément Péron <peron.clem@gmail.com> wrote:
> > >
> > > Hi,
> > >
> > > +Chen-Yu Tsai for test and +Icenowy because she try to contact AW
> > > about this issue.
> > >
> > > On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
> > > >
> > > > WDOG is broken for some H6 rev. The board is not
> > > > reseted correctly.
> > > >
> > > > Use the R_WDOG instead.
> > >
> > > The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
> > > be NOT affected.
> > > Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
> > > complaining about this issue.
> > >
> > > We perform a simple watchdog test on different board :
> > >
> > > Chen-Yu Tsai :
> > > Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
> > > OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
> > >
> > > Martin Ayotte :
> > > PineH64 = H8069BA 6892 => OK
> > > Orange Pi 3 = HA047BA 69W2 => KO
> > > OPiOnePlus = H7310BA 6842 => KO
> > > OPiLite2 = H6448BA 6662 => KO
> > >
> > > Clément Péron:
> > > Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
> > >
> > > After the series of result, Icenowy try to reach Allwinner about this
> > > issue but they seems not interested to investigate it.
> > >
> > > I'm not sure if it's an HW errata or if there something misconfigured
> > > but the result is here WDOG doesn't make these boards reboot.
> > > And this should not happens !
> >
> > How about Linux? same issue.
> Yes, Linux use PSCI, call ATF and we have the same issue as ATF use
> the watchdog to reboot.
>
> Clement

[U-Boot] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Clément Péron]

Hi Jagan,

Is there anything you need to merge this patch?

Thanks,
Clément


On Mon, 29 Apr 2019 at 22:28, Clément Péron <peron.clem@gmail.com> wrote:
>
> Hi Jagan,
>
> FYI the patch on ATF has been merged just now. It has been tested by
> André Przywara on A64, H5 and H6.
>
> https://github.com/ARM-software/arm-trusted-firmware/commit/523ab5be1a84e9aa15fb62c3a15a6338b01d3961
>
> Thanks,
> Clement
>
> On Fri, 19 Apr 2019 at 11:19, Clément Péron <peron.clem@gmail.com> wrote:
> >
> > Hi,
> >
> > On Fri, 19 Apr 2019 at 10:24, Jagan Teki <jagan@amarulasolutions.com> wrote:
> > >
> > > On Fri, Apr 19, 2019 at 1:23 PM Clément Péron <peron.clem@gmail.com> wrote:
> > > >
> > > > Hi,
> > > >
> > > > +Chen-Yu Tsai for test and +Icenowy because she try to contact AW
> > > > about this issue.
> > > >
> > > > On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
> > > > >
> > > > > WDOG is broken for some H6 rev. The board is not
> > > > > reseted correctly.
> > > > >
> > > > > Use the R_WDOG instead.
> > > >
> > > > The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
> > > > be NOT affected.
> > > > Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
> > > > complaining about this issue.
> > > >
> > > > We perform a simple watchdog test on different board :
> > > >
> > > > Chen-Yu Tsai :
> > > > Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
> > > > OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
> > > >
> > > > Martin Ayotte :
> > > > PineH64 = H8069BA 6892 => OK
> > > > Orange Pi 3 = HA047BA 69W2 => KO
> > > > OPiOnePlus = H7310BA 6842 => KO
> > > > OPiLite2 = H6448BA 6662 => KO
> > > >
> > > > Clément Péron:
> > > > Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
> > > >
> > > > After the series of result, Icenowy try to reach Allwinner about this
> > > > issue but they seems not interested to investigate it.
> > > >
> > > > I'm not sure if it's an HW errata or if there something misconfigured
> > > > but the result is here WDOG doesn't make these boards reboot.
> > > > And this should not happens !
> > >
> > > How about Linux? same issue.
> > Yes, Linux use PSCI, call ATF and we have the same issue as ATF use
> > the watchdog to reboot.
> >
> > Clement

[U-Boot] [linux-sunxi] Re: [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Jagan Teki]

On Fri, Apr 19, 2019 at 2:49 PM Clément Péron <peron.clem@gmail.com> wrote:
>
> Hi,
>
> On Fri, 19 Apr 2019 at 10:24, Jagan Teki <jagan@amarulasolutions.com> wrote:
> >
> > On Fri, Apr 19, 2019 at 1:23 PM Clément Péron <peron.clem@gmail.com> wrote:
> > >
> > > Hi,
> > >
> > > +Chen-Yu Tsai for test and +Icenowy because she try to contact AW
> > > about this issue.
> > >
> > > On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
> > > >
> > > > WDOG is broken for some H6 rev. The board is not
> > > > reseted correctly.
> > > >
> > > > Use the R_WDOG instead.
> > >
> > > The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
> > > be NOT affected.
> > > Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
> > > complaining about this issue.
> > >
> > > We perform a simple watchdog test on different board :
> > >
> > > Chen-Yu Tsai :
> > > Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
> > > OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
> > >
> > > Martin Ayotte :
> > > PineH64 = H8069BA 6892 => OK
> > > Orange Pi 3 = HA047BA 69W2 => KO
> > > OPiOnePlus = H7310BA 6842 => KO
> > > OPiLite2 = H6448BA 6662 => KO
> > >
> > > Clément Péron:
> > > Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
> > >
> > > After the series of result, Icenowy try to reach Allwinner about this
> > > issue but they seems not interested to investigate it.
> > >
> > > I'm not sure if it's an HW errata or if there something misconfigured
> > > but the result is here WDOG doesn't make these boards reboot.
> > > And this should not happens !
> >
> > How about Linux? same issue.
> Yes, Linux use PSCI, call ATF and we have the same issue as ATF use
> the watchdog to reboot.

There is an RFC for watchdog, can you have any change to add reset_cpu
via that driver (ofcourse it's a rework)?

[U-Boot] [linux-sunxi] Re: [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Clément Péron]

On Sun, 12 May 2019 at 20:23, Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> On Fri, Apr 19, 2019 at 2:49 PM Clément Péron <peron.clem@gmail.com> wrote:
> >
> > Hi,
> >
> > On Fri, 19 Apr 2019 at 10:24, Jagan Teki <jagan@amarulasolutions.com> wrote:
> > >
> > > On Fri, Apr 19, 2019 at 1:23 PM Clément Péron <peron.clem@gmail.com> wrote:
> > > >
> > > > Hi,
> > > >
> > > > +Chen-Yu Tsai for test and +Icenowy because she try to contact AW
> > > > about this issue.
> > > >
> > > > On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
> > > > >
> > > > > WDOG is broken for some H6 rev. The board is not
> > > > > reseted correctly.
> > > > >
> > > > > Use the R_WDOG instead.
> > > >
> > > > The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
> > > > be NOT affected.
> > > > Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
> > > > complaining about this issue.
> > > >
> > > > We perform a simple watchdog test on different board :
> > > >
> > > > Chen-Yu Tsai :
> > > > Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
> > > > OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
> > > >
> > > > Martin Ayotte :
> > > > PineH64 = H8069BA 6892 => OK
> > > > Orange Pi 3 = HA047BA 69W2 => KO
> > > > OPiOnePlus = H7310BA 6842 => KO
> > > > OPiLite2 = H6448BA 6662 => KO
> > > >
> > > > Clément Péron:
> > > > Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
> > > >
> > > > After the series of result, Icenowy try to reach Allwinner about this
> > > > issue but they seems not interested to investigate it.
> > > >
> > > > I'm not sure if it's an HW errata or if there something misconfigured
> > > > but the result is here WDOG doesn't make these boards reboot.
> > > > And this should not happens !
> > >
> > > How about Linux? same issue.
> > Yes, Linux use PSCI, call ATF and we have the same issue as ATF use
> > the watchdog to reboot.
>

Hi,

> There is an RFC for watchdog, can you have any change to add reset_cpu
> via that driver (ofcourse it's a rework)?
It's indeed a more proper way but it's a different work.
I'm only trying to fix the reboot issue on some H6 boards.
Moreover modifying this part will require some testing on different
Allwinner boards that I don't have.

Thanks,
Clement

[U-Boot] [linux-sunxi] Re: [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Jagan Teki]

On Mon, May 13, 2019 at 2:58 AM Clément Péron <peron.clem@gmail.com> wrote:
>
> On Sun, 12 May 2019 at 20:23, Jagan Teki <jagan@amarulasolutions.com> wrote:
> >
> > On Fri, Apr 19, 2019 at 2:49 PM Clément Péron <peron.clem@gmail.com> wrote:
> > >
> > > Hi,
> > >
> > > On Fri, 19 Apr 2019 at 10:24, Jagan Teki <jagan@amarulasolutions.com> wrote:
> > > >
> > > > On Fri, Apr 19, 2019 at 1:23 PM Clément Péron <peron.clem@gmail.com> wrote:
> > > > >
> > > > > Hi,
> > > > >
> > > > > +Chen-Yu Tsai for test and +Icenowy because she try to contact AW
> > > > > about this issue.
> > > > >
> > > > > On Wed, 17 Apr 2019 at 19:41, Clément Péron <peron.clem@gmail.com> wrote:
> > > > > >
> > > > > > WDOG is broken for some H6 rev. The board is not
> > > > > > reseted correctly.
> > > > > >
> > > > > > Use the R_WDOG instead.
> > > > >
> > > > > The issue is real except on Pine H64 and Rongpin RP-H6B which seems to
> > > > > be NOT affected.
> > > > > Lot of users on OrangePi boards (Lite2 / One Plus and 3) are
> > > > > complaining about this issue.
> > > > >
> > > > > We perform a simple watchdog test on different board :
> > > > >
> > > > > Chen-Yu Tsai :
> > > > > Pine h64 = H6 V200-AWIN H6448BA 7782 => OK
> > > > > OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
> > > > >
> > > > > Martin Ayotte :
> > > > > PineH64 = H8069BA 6892 => OK
> > > > > Orange Pi 3 = HA047BA 69W2 => KO
> > > > > OPiOnePlus = H7310BA 6842 => KO
> > > > > OPiLite2 = H6448BA 6662 => KO
> > > > >
> > > > > Clément Péron:
> > > > > Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
> > > > >
> > > > > After the series of result, Icenowy try to reach Allwinner about this
> > > > > issue but they seems not interested to investigate it.
> > > > >
> > > > > I'm not sure if it's an HW errata or if there something misconfigured
> > > > > but the result is here WDOG doesn't make these boards reboot.
> > > > > And this should not happens !
> > > >
> > > > How about Linux? same issue.
> > > Yes, Linux use PSCI, call ATF and we have the same issue as ATF use
> > > the watchdog to reboot.
> >
>
> Hi,
>
> > There is an RFC for watchdog, can you have any change to add reset_cpu
> > via that driver (ofcourse it's a rework)?
> It's indeed a more proper way but it's a different work.
> I'm only trying to fix the reboot issue on some H6 boards.
> Moreover modifying this part will require some testing on different
> Allwinner boards that I don't have.

True, may be we can plan it for next MW.

[U-Boot] [linux-sunxi] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Jagan Teki]

On Wed, Apr 17, 2019 at 11:11 PM Clément Péron <peron.clem@gmail.com> wrote:
>
> WDOG is broken for some H6 rev. The board is not
> reseted correctly.
>
> Use the R_WDOG instead.

Can you describe the proper issue why it broken? this would really
help us to understand and future reference.

[U-Boot] [linux-sunxi] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Clément Péron]

Hi Jagan,

On Tue, 14 May 2019 at 15:49, Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> On Wed, Apr 17, 2019 at 11:11 PM Clément Péron <peron.clem@gmail.com> wrote:
> >
> > WDOG is broken for some H6 rev. The board is not
> > reseted correctly.
> >
> > Use the R_WDOG instead.
>
> Can you describe the proper issue why it broken? this would really
> help us to understand and future reference.

I would like but I don't have much information on it.
If I take the information in my 2nd email is it ok for you ?

Something like this
"
Some H6 boards have a watchdog which didn't make the SoC reboot properly.
Reason is still unknown but several people have test it.
Chen-Yu Tsai :
Pine H64 = H6 V200-AWIN H6448BA 7782 => OK
OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO

Martin Ayotte :
Pine H64 = H8069BA 6892 => OK
OrangePi 3 = HA047BA 69W2 => KO
OrangePi One Plus = H7310BA 6842 => KO
OrangePi Lite2 = H6448BA 6662 => KO

Clément Péron:
Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO

After the series of result, Icenowy try to reach Allwinner about this
issue but they seems not interested to investigate it.

As we don't have the ARIS coproc to do power management and watchdogis
the only solution to reset the board.
Change from watchdog to R_watchdog to allow a reboot on all H6 boards.
"

Thanks,
Clement

[U-Boot] [linux-sunxi] [PATCH v3 3/3] arm: sunxi: h6: fix reset using r_wdog

[Jagan Teki]

On Tue, May 14, 2019 at 8:38 PM Clément Péron <peron.clem@gmail.com> wrote:
>
> Hi Jagan,
>
> On Tue, 14 May 2019 at 15:49, Jagan Teki <jagan@amarulasolutions.com> wrote:
> >
> > On Wed, Apr 17, 2019 at 11:11 PM Clément Péron <peron.clem@gmail.com> wrote:
> > >
> > > WDOG is broken for some H6 rev. The board is not
> > > reseted correctly.
> > >
> > > Use the R_WDOG instead.
> >
> > Can you describe the proper issue why it broken? this would really
> > help us to understand and future reference.
>
> I would like but I don't have much information on it.
> If I take the information in my 2nd email is it ok for you ?
>
> Something like this
> "
> Some H6 boards have a watchdog which didn't make the SoC reboot properly.
> Reason is still unknown but several people have test it.
> Chen-Yu Tsai :
> Pine H64 = H6 V200-AWIN H6448BA 7782 => OK
> OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO
>
> Martin Ayotte :
> Pine H64 = H8069BA 6892 => OK
> OrangePi 3 = HA047BA 69W2 => KO
> OrangePi One Plus = H7310BA 6842 => KO
> OrangePi Lite2 = H6448BA 6662 => KO
>
> Clément Péron:
> Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO
>
> After the series of result, Icenowy try to reach Allwinner about this
> issue but they seems not interested to investigate it.
>
> As we don't have the ARIS coproc to do power management and watchdogis
> the only solution to reset the board.
> Change from watchdog to R_watchdog to allow a reboot on all H6 boards.

Thanks, included this and

Applied to u-boot-sunxi/master