From: Dinh Nguyen <dinguyen@kernel.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv5 0/6] dm: cache: add dm cache driver
Date: Tue, 23 Apr 2019 16:55:00 -0500 [thread overview]
Message-ID: <20190423215506.7515-1-dinguyen@kernel.org> (raw)
Hi,
This is V4 of the series to add a UCLASS_CACHE dm driver to handling
the configuration of cache settings. Place this new driver under
/drivers/cache. In this initial revision, the driver is only configuring
what I think are essential cache settings. The more comprehensive cache
settings can be done in the OS.
Diffs from v4:
- Fix compile error found in sandbox_cache.c
Dinh Nguyen (6):
Documentation: dts: Add pl310 cache controller dts documentation
ARM: pl310: Add macro's for handling tag and data latency mask
dm: cache: Create a uclass for cache
dm: cache: add the pl310 cache controller driver
ARM: socfpga: use the pl310 driver to configure the cache
configs: socfpga: add imply pl310 cache controller
.../devicetree/bindings/arm/l2c2x0.txt | 114 ++++++++++++++++++
arch/arm/Kconfig | 1 +
arch/arm/include/asm/pl310.h | 3 +
arch/arm/mach-socfpga/misc.c | 16 +--
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/cache/Kconfig | 25 ++++
drivers/cache/Makefile | 4 +
drivers/cache/cache-l2x0.c | 76 ++++++++++++
drivers/cache/cache-uclass.c | 24 ++++
drivers/cache/sandbox_cache.c | 34 ++++++
include/cache.h | 38 ++++++
include/dm/uclass-id.h | 1 +
test/dm/cache.c | 20 +++
14 files changed, 346 insertions(+), 13 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/l2c2x0.txt
create mode 100644 drivers/cache/Kconfig
create mode 100644 drivers/cache/Makefile
create mode 100644 drivers/cache/cache-l2x0.c
create mode 100644 drivers/cache/cache-uclass.c
create mode 100644 drivers/cache/sandbox_cache.c
create mode 100644 include/cache.h
create mode 100644 test/dm/cache.c
--
2.20.0
next reply other threads:[~2019-04-23 21:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-23 21:55 Dinh Nguyen [this message]
2019-04-23 21:55 ` [U-Boot] [PATCHv5 1/6] Documentation: dts: Add pl310 cache controller dts documentation Dinh Nguyen
2019-05-06 11:13 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 2/6] ARM: pl310: Add macro's for handling tag and data latency mask Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 3/6] dm: cache: Create a uclass for cache Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 4/6] dm: cache: add the pl310 cache controller driver Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 5/6] ARM: socfpga: use the pl310 driver to configure the cache Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 6/6] configs: socfpga: add imply pl310 cache controller Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 22:02 ` [U-Boot] [PATCHv5 0/6] dm: cache: add dm cache driver Tom Rini
2019-04-24 12:32 ` Dinh Nguyen
2019-04-24 12:58 ` Tom Rini
2019-04-24 23:50 ` Dinh Nguyen
2019-04-24 23:51 ` Tom Rini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190423215506.7515-1-dinguyen@kernel.org \
--to=dinguyen@kernel.org \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox