From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv5 2/6] ARM: pl310: Add macro's for handling tag and data latency mask
Date: Mon, 6 May 2019 07:14:00 -0400 [thread overview]
Message-ID: <20190506111400.GU31207@bill-the-cat> (raw)
In-Reply-To: <20190423215506.7515-3-dinguyen@kernel.org>
On Tue, Apr 23, 2019 at 04:55:02PM -0500, Dinh Nguyen wrote:
> Add the PL310 macros for latency control setup, read and write bits.
>
> Reviewed-by: Marek Vasut <marex@denx.de>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Applied to u-boot/master, thanks!
--
Tom
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next prev parent reply other threads:[~2019-05-06 11:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-23 21:55 [U-Boot] [PATCHv5 0/6] dm: cache: add dm cache driver Dinh Nguyen
2019-04-23 21:55 ` [U-Boot] [PATCHv5 1/6] Documentation: dts: Add pl310 cache controller dts documentation Dinh Nguyen
2019-05-06 11:13 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 2/6] ARM: pl310: Add macro's for handling tag and data latency mask Dinh Nguyen
2019-05-06 11:14 ` Tom Rini [this message]
2019-04-23 21:55 ` [U-Boot] [PATCHv5 3/6] dm: cache: Create a uclass for cache Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 4/6] dm: cache: add the pl310 cache controller driver Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 5/6] ARM: socfpga: use the pl310 driver to configure the cache Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 21:55 ` [U-Boot] [PATCHv5 6/6] configs: socfpga: add imply pl310 cache controller Dinh Nguyen
2019-05-06 11:14 ` Tom Rini
2019-04-23 22:02 ` [U-Boot] [PATCHv5 0/6] dm: cache: add dm cache driver Tom Rini
2019-04-24 12:32 ` Dinh Nguyen
2019-04-24 12:58 ` Tom Rini
2019-04-24 23:50 ` Dinh Nguyen
2019-04-24 23:51 ` Tom Rini
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