From: Lukasz Majewski <lukma@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [i.MX8MM+CCF 00/41] i.MX8MM + CCF
Date: Mon, 6 May 2019 23:32:08 +0200 [thread overview]
Message-ID: <20190506233208.4a92dc7b@jawa> (raw)
In-Reply-To: <20190430103056.32537-1-peng.fan@nxp.com>
Hi Peng,
> This patch set is based Lukasz V3 CCF patchset,
> [PATCH v3 00/11] clk: Port Linux common clock framework [CCF] to
> U-boot (tag: 5.0-rc3)
> https://github.com/lmajewski/u-boot-dfu/commits/CCF-v3
>
> Added a few fixes to Lukasz's v3 patchset.
> Introduced clk-gate/composite
> Added set rate support
> Per my understanding, U-Boot CCF will not support mux reparent, and
> support rate prograte setting to parent automatically.
I think that we shall keep the code as small as possible and hence add
only necessary features (that is why my code only supports gating and
muxing for 'downstream' settings).
> So new clk
> feature added follow this rule.
>
> There are many warnings when importing linux ccf code, I did not
> modify them all.
I've removed some not needed arguments (like spinlocks) when porting
the code.
>
> The rest patches are for i.MX8MM, part of legacy clk code are still
> kept, because we are hard to enable CCF at very early stage,
Yes, CCF in SPL is a challenging task.
> we set
> malloc space to DRAM when dram initialized in spl stage, so we have
> limited SRAM for uclass dm and dm clk,
I'm puzzled about this sentence. The malloc is set to be in DRAM, but
also SRAM is used for uclass dm and CCF.
As fair as I remember on iMX6Q it is possible to setup early malloc to
be in SRAM (OCRAM). Having it in DRAM is a bit late, IMHO as clocks
are already setup in this moment.
> so keep the DRAM PLL related
> setting with legacy clk code which use small ram.
What is the 'ram' ? I suppose that the legacy clk code uses OCRAM to
allocate variables ?
>
> The u-boot-spl.bin now is about 100KB without ddr firmware,usb stack
> and hab, so really large......
I think that 100KiB is too much (without DDR, USB stack and HAB). For
one IMX6Q setup (before DM/DTS conversion) I had SPL size ~30 KiB.
After the conversion it is 55 KiB ...
> I am thinking what we could do to shrink the size, welcome any
> suggestions.
Please consider using:
- TINY_PRINTF
- TINY_FIT support (just support for single image in FIT)
- OF_PLATDATA (the in-device-tree code is compiled in as C
structures) - no need to include DTS parsing / handling code in SPL.
Also the *.dts file is not needed.
Drawback is that you need to extend drivers to support OF_PLATDATA
(RK3399 have some examples of such approach).
- Check if thumb2 is uses for SPL compilation
- I simply do find *.o files and sort them regarding the size. Then I
do know where to start with optimisations.
>
> Not expect this patchset could be merged, because of the CCF/clock
> code change, but since the clock part blocks i.MX8MM upstream, just
> would like to speed up the development with community and move on.
>
> Peng Fan (40):
> clk: correct get clk_x pointer
> clk: fixed-factor: fix get clk_fixed_factor
> clk: introduce clk_dev_binded
> clk: use clk_dev_binded
> clk-provider: sync more clk flags from Linux Kernel
> cmd: clk: print err value when clk_get_rate failed
> clk: mux: add set parent support
> clk: export mux/divider ops
> clk: add clk-gate support
> divider set rate supporrt
> clk: fixed_rate: export clk_fixed_rate
> clk: fixed_rate: add pre reloc flag
> clk: imx: import clk heplers
> clk: imx: gate2 add set rate
> linux: compat: guard PAGE_SIZE
> drivers: core: use strcmp when find device by name
> ddr: imx8m: fix ddr firmware location when enable SPL OF
> imx: add IMX8MQ kconfig entry
> imx: add IMX8MM kconfig entry
> imx: imx8mm: add clock bindings header
> imx: add i.MX8MM cpu type
> imx: spl: add spl_board_boot_device for i.MX8MM
> imx8m: update imx-regs for i.MX8MM
> imx: add get_cpu_rev support for i.MX8MM
> imx8m: rename clock to clock_imx8mq
> imx8m: restructure clock.h
> imx8m: add clk support for i.MX8MM
> imx8m: soc: probe clk before relocation
> imx8m: add pin header for i.MX8MM
> imx: add i.MX8MM PE property
> imx8m: Fix MMU table issue for OPTEE memory
> imx8m: set BYPASS ID SWAP to avoid AXI bus errors
> imx8m: soc: enable SCTR clock before timer init
> serial: Kconfig: make MXC_UART usable for MX7 and IMX8M
> clk: imx: add Kconfig entry for i.MX8MM
> clk: imx: add pll14xx driver
> clk: add composite clk support
> clk: imx: add i.MX8MM composite clk support
> clk: imx: add i.MX8MM clk driver
> imx: add i.MX8MM EVK board support
>
> Ye Li (1):
> imx8m: Configure trustzone region 0 for non-secure access
>
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/imx8mm-evk-u-boot.dtsi | 92 +
> arch/arm/dts/imx8mm-evk.dts | 235 +++
> arch/arm/dts/imx8mm-pinfunc.h | 629 +++++++
> arch/arm/dts/imx8mm.dtsi | 733 ++++++++
> arch/arm/include/asm/arch-imx/cpu.h | 6 +
> arch/arm/include/asm/arch-imx8m/clock.h | 493 +----
> arch/arm/include/asm/arch-imx8m/clock_imx8mm.h | 387 ++++
> arch/arm/include/asm/arch-imx8m/clock_imx8mq.h | 424 +++++
> arch/arm/include/asm/arch-imx8m/imx-regs.h | 75 +-
> arch/arm/include/asm/arch-imx8m/imx8mm_pins.h | 691 +++++++
> arch/arm/include/asm/mach-imx/iomux-v3.h | 4 +
> arch/arm/include/asm/mach-imx/sys_proto.h | 8 +
> arch/arm/mach-imx/cpu.c | 12 +
> arch/arm/mach-imx/imx8m/Kconfig | 17 +-
> arch/arm/mach-imx/imx8m/Makefile | 4 +-
> arch/arm/mach-imx/imx8m/clock_imx8mm.c | 292 +++
> .../arm/mach-imx/imx8m/{clock.c => clock_imx8mq.c} | 5 +-
> arch/arm/mach-imx/imx8m/clock_slice.c | 461 +++++
> arch/arm/mach-imx/imx8m/soc.c | 112 +-
> arch/arm/mach-imx/spl.c | 8 +
> board/freescale/imx8mm_evk/Kconfig | 12 +
> board/freescale/imx8mm_evk/MAINTAINERS | 6 +
> board/freescale/imx8mm_evk/Makefile | 12 +
> board/freescale/imx8mm_evk/imx8mm_evk.c | 90 +
> board/freescale/imx8mm_evk/lpddr4_timing.c | 1980
> ++++++++++++++++++++
> board/freescale/imx8mm_evk/spl.c | 216 +++
> cmd/clk.c | 2 +
> configs/imx8mm_evk_defconfig | 52 +
> drivers/clk/Kconfig | 14 +
> drivers/clk/Makefile | 3 +-
> drivers/clk/clk-composite.c | 165 ++
> drivers/clk/clk-divider.c | 92 +-
> drivers/clk/clk-fixed-factor.c | 2 +-
> drivers/clk/clk-gate.c | 151 ++
> drivers/clk/clk-mux.c | 76 +-
> drivers/clk/clk.c | 8 +
> drivers/clk/clk_fixed_rate.c | 9 +-
> drivers/clk/imx/Kconfig | 9 +
> drivers/clk/imx/Makefile | 1 +
> drivers/clk/imx/clk-composite-8m.c | 170 ++
> drivers/clk/imx/clk-gate2.c | 15 +-
> drivers/clk/imx/clk-imx8mm.c | 415 ++++
> drivers/clk/imx/clk-pfd.c | 2 +-
> drivers/clk/imx/clk-pll14xx.c | 377 ++++
> drivers/clk/imx/clk-pllv3.c | 2 +-
> drivers/clk/imx/clk.h | 106 ++
> drivers/core/uclass.c | 2 +-
> drivers/ddr/imx/imx8m/helper.c | 12 +-
> drivers/serial/Kconfig | 2 +-
> include/clk.h | 9 +
> include/configs/imx8mm_evk.h | 199 ++
> include/dt-bindings/clock/imx8mm-clock.h | 244 +++
> include/linux/clk-provider.h | 74 +
> include/linux/compat.h | 2 + 55 files
> changed, 8728 insertions(+), 494 deletions(-) create mode 100644
> arch/arm/dts/imx8mm-evk-u-boot.dtsi create mode 100644
> arch/arm/dts/imx8mm-evk.dts create mode 100644
> arch/arm/dts/imx8mm-pinfunc.h create mode 100644
> arch/arm/dts/imx8mm.dtsi create mode 100644
> arch/arm/include/asm/arch-imx8m/clock_imx8mm.h create mode 100644
> arch/arm/include/asm/arch-imx8m/clock_imx8mq.h create mode 100644
> arch/arm/include/asm/arch-imx8m/imx8mm_pins.h create mode 100644
> arch/arm/mach-imx/imx8m/clock_imx8mm.c rename
> arch/arm/mach-imx/imx8m/{clock.c => clock_imx8mq.c} (99%) create mode
> 100644 board/freescale/imx8mm_evk/Kconfig create mode 100644
> board/freescale/imx8mm_evk/MAINTAINERS create mode 100644
> board/freescale/imx8mm_evk/Makefile create mode 100644
> board/freescale/imx8mm_evk/imx8mm_evk.c create mode 100644
> board/freescale/imx8mm_evk/lpddr4_timing.c create mode 100644
> board/freescale/imx8mm_evk/spl.c create mode 100644
> configs/imx8mm_evk_defconfig create mode 100644
> drivers/clk/clk-composite.c create mode 100644 drivers/clk/clk-gate.c
> create mode 100644 drivers/clk/imx/clk-composite-8m.c
> create mode 100644 drivers/clk/imx/clk-imx8mm.c
> create mode 100644 drivers/clk/imx/clk-pll14xx.c
> create mode 100644 include/configs/imx8mm_evk.h
> create mode 100644 include/dt-bindings/clock/imx8mm-clock.h
>
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 488 bytes
Desc: OpenPGP digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20190506/6668a266/attachment.sig>
next prev parent reply other threads:[~2019-05-06 21:32 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-30 10:17 [U-Boot] [i.MX8MM+CCF 00/41] i.MX8MM + CCF Peng Fan
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 01/41] clk: correct get clk_x pointer Peng Fan
2019-05-06 21:36 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 02/41] clk: fixed-factor: fix get clk_fixed_factor Peng Fan
2019-05-06 21:41 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded Peng Fan
2019-05-06 21:57 ` Lukasz Majewski
2019-05-07 13:22 ` Peng Fan
2019-05-08 7:30 ` Lukasz Majewski
2019-05-08 7:41 ` Peng Fan
2019-05-08 22:24 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 04/41] clk: use clk_dev_binded Peng Fan
2019-05-06 21:59 ` Lukasz Majewski
2019-05-08 7:27 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 05/41] clk-provider: sync more clk flags from Linux Kernel Peng Fan
2019-05-06 22:01 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 06/41] cmd: clk: print err value when clk_get_rate failed Peng Fan
2019-05-06 22:03 ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 07/41] clk: mux: add set parent support Peng Fan
2019-05-06 22:04 ` Lukasz Majewski
2019-05-07 13:23 ` Peng Fan
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 08/41] clk: export mux/divider ops Peng Fan
2019-05-06 22:06 ` Lukasz Majewski
2019-05-07 13:25 ` Peng Fan
2019-05-08 6:31 ` Lukasz Majewski
2019-05-08 6:35 ` Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 09/41] clk: add clk-gate support Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 10/41] divider set rate supporrt Peng Fan
2019-05-06 22:08 ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 11/41] clk: fixed_rate: export clk_fixed_rate Peng Fan
2019-05-06 22:15 ` Lukasz Majewski
2019-05-07 13:27 ` Peng Fan
2019-05-08 6:46 ` Lukasz Majewski
2019-05-08 6:51 ` Peng Fan
2019-05-08 7:40 ` Lukasz Majewski
2019-05-08 7:45 ` Peng Fan
2019-05-08 22:27 ` Lukasz Majewski
2019-05-09 1:13 ` Peng Fan
2019-05-16 8:55 ` Lukasz Majewski
2019-05-16 9:58 ` Peng Fan
2019-05-16 10:08 ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 12/41] clk: fixed_rate: add pre reloc flag Peng Fan
2019-05-06 22:16 ` Lukasz Majewski
2019-05-07 13:29 ` Peng Fan
2019-05-07 14:00 ` Bin Meng
2019-05-08 7:00 ` Lukasz Majewski
2019-05-08 6:57 ` Lukasz Majewski
2019-05-08 7:21 ` Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 13/41] clk: imx: import clk heplers Peng Fan
2019-05-06 22:17 ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 14/41] clk: imx: gate2 add set rate Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 15/41] linux: compat: guard PAGE_SIZE Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 16/41] drivers: core: use strcmp when find device by name Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 17/41] ddr: imx8m: fix ddr firmware location when enable SPL OF Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 18/41] imx: add IMX8MQ kconfig entry Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 19/41] imx: add IMX8MM " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 20/41] imx: imx8mm: add clock bindings header Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 21/41] imx: add i.MX8MM cpu type Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 22/41] imx: spl: add spl_board_boot_device for i.MX8MM Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 23/41] imx8m: update imx-regs " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 24/41] imx: add get_cpu_rev support " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 25/41] imx8m: rename clock to clock_imx8mq Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 26/41] imx8m: restructure clock.h Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 27/41] imx8m: add clk support for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 28/41] imx8m: soc: probe clk before relocation Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 29/41] imx8m: add pin header for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 30/41] imx: add i.MX8MM PE property Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 31/41] imx8m: Fix MMU table issue for OPTEE memory Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 32/41] imx8m: set BYPASS ID SWAP to avoid AXI bus errors Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 33/41] imx8m: Configure trustzone region 0 for non-secure access Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 34/41] imx8m: soc: enable SCTR clock before timer init Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 35/41] serial: Kconfig: make MXC_UART usable for MX7 and IMX8M Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 36/41] clk: imx: add Kconfig entry for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 37/41] clk: imx: add pll14xx driver Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 38/41] clk: add composite clk support Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 39/41] clk: imx: add i.MX8MM " Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 40/41] clk: imx: add i.MX8MM clk driver Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 41/41] imx: add i.MX8MM EVK board support Peng Fan
2019-05-06 7:57 ` [U-Boot] [i.MX8MM+CCF 00/41] i.MX8MM + CCF Schrempf Frieder
2019-05-06 8:26 ` Schrempf Frieder
2019-05-06 9:08 ` Peng Fan
2019-05-06 9:55 ` Lukasz Majewski
2019-05-06 21:32 ` Lukasz Majewski [this message]
2019-05-07 13:16 ` Peng Fan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190506233208.4a92dc7b@jawa \
--to=lukma@denx.de \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox