From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lukasz Majewski Date: Tue, 7 May 2019 00:01:27 +0200 Subject: [U-Boot] [i.MX8MM+CCF 05/41] clk-provider: sync more clk flags from Linux Kernel In-Reply-To: <20190430103056.32537-6-peng.fan@nxp.com> References: <20190430103056.32537-1-peng.fan@nxp.com> <20190430103056.32537-6-peng.fan@nxp.com> Message-ID: <20190507000127.5cef13d9@jawa> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, 30 Apr 2019 10:17:47 +0000 Peng Fan wrote: > Sync more clk flags that might be used in U-Boot CCF. > > Signed-off-by: Peng Fan > --- > include/linux/clk-provider.h | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/include/linux/clk-provider.h > b/include/linux/clk-provider.h index eac045c5f8..3458746a60 100644 > --- a/include/linux/clk-provider.h > +++ b/include/linux/clk-provider.h > @@ -9,8 +9,29 @@ > #ifndef __LINUX_CLK_PROVIDER_H > #define __LINUX_CLK_PROVIDER_H > > +/* > + * flags used across common struct clk. these flags should only > affect the > + * top-level framework. custom flags for dealing with hardware > specifics > + * belong in struct clk_foo > + * > + * Please update clk_flags[] in drivers/clk/clk.c when making > changes here! > + */ > +#define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate > change */ +#define CLK_SET_PARENT_GATE BIT(1) /* must be gated > across re-parent */ #define CLK_SET_RATE_PARENT BIT(2) /* > propagate rate change up one level */ +#define > CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */ > + /* unused */ > +#define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a > to_clk_foo() */ > +#define CLK_GET_RATE_NOCACHE BIT(6) /* do not > use the cached clk rate */ I guess that this is what your requested for the NOCACHE (to always recalculate the rate). > #define CLK_SET_RATE_NO_REPARENT BIT(7) /* > don't re-parent on rate change */ +#define CLK_GET_ACCURACY_NOCACHE > BIT(8) /* do not use the cached clk accuracy */ +#define > CLK_RECALC_NEW_RATES BIT(9) /* recalc rates after > notifications */ +#define CLK_SET_RATE_UNGATE BIT(10) /* clock > needs to run to set rate */ +#define CLK_IS_CRITICAL > BIT(11) /* do not gate, ever */ +/* parents need enable during > gate/ungate, set rate and re-parent */ +#define > CLK_OPS_PARENT_ENABLE BIT(12) +/* duty cycle call may be > forwarded to the parent clock */ +#define > CLK_DUTY_CYCLE_PARENT BIT(13) #define > CLK_MUX_INDEX_ONE BIT(0) #define > CLK_MUX_INDEX_BIT BIT(1) Reviewed-by: Lukasz Majewski Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 488 bytes Desc: OpenPGP digital signature URL: