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From: Lukasz Majewski <lukma@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded
Date: Thu, 9 May 2019 00:24:56 +0200	[thread overview]
Message-ID: <20190509002456.7e84f209@jawa> (raw)
In-Reply-To: <AM0PR04MB4481F2C7ACC002BDF19EAE9088320@AM0PR04MB4481.eurprd04.prod.outlook.com>

On Wed, 8 May 2019 07:41:18 +0000
Peng Fan <peng.fan@nxp.com> wrote:

> > -----Original Message-----
> > From: Lukasz Majewski [mailto:lukma at denx.de]
> > Sent: 2019年5月8日 15:31
> > To: Peng Fan <peng.fan@nxp.com>
> > Cc: sbabic at denx.de; festevam at gmail.com; dl-uboot-imx
> > <uboot-imx@nxp.com>; sjg at chromium.org; jagan at amarulasolutions.com;
> > sr at denx.de; u-boot at lists.denx.de; trini at konsulko.com
> > Subject: Re: [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded
> > 
> > On Tue, 7 May 2019 13:22:24 +0000
> > Peng Fan <peng.fan@nxp.com> wrote:
> >   
> > > > Subject: Re: [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded
> > > >
> > > > On Tue, 30 Apr 2019 10:17:40 +0000
> > > > Peng Fan <peng.fan@nxp.com> wrote:
> > > >  
> > > > > When support Clock Common Framework, U-Boot use dev for clk
> > > > > tree information, there is no clk->parent.  
> > > >
> > > > There is a function in clk uclass named:
> > > > clk_get_parent() to provide parent of the clock.
> > > >  
> > > > > When
> > > > > support composite clk, it contains mux/gate/divider, but the
> > > > > mux/gate/divider is not binded with device.  
> > > >
> > > > There is a binding:
> > > > struct clk_pllv3 {
> > > > 	struct clk	clk;
> > > > 	...
> > > > };
> > > >
> > > > The clk.dev points to corresponding device.
> > > >
> > > > In the opposite direction we do have dev->driver_data, which
> > > > points to struct clk embedded in for example struct clk_pllv3.
> > > > (as struct clk_pllv3 and struct clk share the same address it
> > > > is up to us to cast it properly).
> > > >
> > > > I've written my thoughts and considerations about using
> > > > dev->private and dev->driver_data in the patch cover letter [1]
> > > >
> > > >  
> > > > > So we could not use dev_get_driver_data to get the correct
> > > > > clk_mux/gate/divider.  
> > > >
> > > > Maybe I've overlooked something, but dev_get_driver_data() shall
> > > > provide correct reference to udevice.  
> > >
> > > A composite clk contains a mux/gate/divider clk. Only the
> > > composite clk needs to binded with a udevice.  
> > 
> > So, if I understood correctly we do need to have another reference
> > to udevice (or clock)?  
> 
> The composite clk structure
> struct clk_composite {
>         struct clk      clk;
>         struct clk_ops  ops;
> 
>         struct clk      *mux;
>         struct clk      *rate;
>         struct clk      *gate;
> 
>         const struct clk_ops    *mux_ops;
>         const struct clk_ops    *rate_ops;
>         const struct clk_ops    *gate_ops;
> };
> 
> Only the first clk needs to be binded with a udevice.
> The mux/rate/gate pointer is only used for composite clk
> internal usage and no udevice will be binded with them.
> 
> > 
> > Please correct my understanding:
> > 
> > - Composite clock would use clk->dev (to have pointer to struct
> > udevice) and dev->driver_data to have pointer to clk.  
> 
> Yes, for the composite clk.
> 
> > 
> > - Then we use udevice flag DM_FLAG_BOUND to indicate if this device
> > has other udevices (i.e. clk) bound.  
> 
> Yes, DM_FLAG_BOUND means the clk has a udevice binded.
> 
> > 
> > - If it has bounded device then we use dev->driver_data to get it's
> >   struct clk (or clock IP - like mux). If not, then we just use this
> >   clk.  
> 
> Yes.
> 
> > 
> > Considering the above - the commit message needs detailed
> > explanation of the "binding" concept.
> >   
> > > The mux/gate/divider inside a
> > > composite clk should not bind a device, because they needs to be
> > > hidden from dm tree or clk dumps.
> > >
> > > If bind the mux/gate/divider insides a composite clk, that will be
> > > mess.  
> > 
> > But the composite clock itself would be printed in 'dm tree' ?  
> 
> Yes.
> 
> > 
> > If yes, maybe we can add some kind of indication that it is a
> > "container" and that it has some clocks "binded" ?  
> 
> Looking at clk summary from Linux /sys/kernel/debug/clk/clk_summary,
> There is no flag shows that it is a composite clk or not.
> 
> I think only add a flag to show the clk is a container does not make
> much sense.

Ok. I see.

> 
> Thanks,
> Peng.
> 
> >   
> > > The reason to introduce composite clk is to make clk tree
> > > cleaner/simplier.  
> > 
> > Ok. No problem with this.
> >   
> > >
> > > Regards,
> > > Peng.
> > >  
> > > >  
> > > > > So add clk_dev_binded to let
> > > > > choose the correct method.
> > > > >  
> > > >
> > > > [1] - http://patchwork.ozlabs.org/cover/1090669/
> > > >  
> > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > > > ---
> > > > >  drivers/clk/clk.c | 8 ++++++++
> > > > >  include/clk.h     | 9 +++++++++
> > > > >  2 files changed, 17 insertions(+)
> > > > >
> > > > > diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index
> > > > > 0a0fffb50b..025bb99ecc 100644
> > > > > --- a/drivers/clk/clk.c
> > > > > +++ b/drivers/clk/clk.c
> > > > > @@ -54,3 +54,11 @@ const char *clk_hw_get_name(const struct
> > > > > clk *hw) {
> > > > >  	return hw->dev->name;
> > > > >  }
> > > > > +
> > > > > +bool clk_dev_binded(struct clk *clk) {
> > > > > +	if (clk->dev && (clk->dev->flags & DM_FLAG_BOUND))
> > > > > +		return true;
> > > > > +
> > > > > +	return false;
> > > > > +}
> > > > > diff --git a/include/clk.h b/include/clk.h index
> > > > > a4ecca9fbc..8199119d01 100644
> > > > > --- a/include/clk.h
> > > > > +++ b/include/clk.h
> > > > > @@ -337,4 +337,13 @@ static inline bool clk_valid(struct clk
> > > > > *clk)
> > > > >   * @return zero on success, or -ENOENT on error
> > > > >   */
> > > > >  int clk_get_by_id(ulong id, struct clk **clkp);
> > > > > +
> > > > > +/**
> > > > > + * clk_dev_binded() - Check whether the clk has a device
> > > > > binded
> > > > > + *
> > > > > + * @clk		A pointer to the clk
> > > > > + *
> > > > > + * @return true on binded, or false on no  */ bool
> > > > > +clk_dev_binded(struct clk *clk);
> > > > >  #endif  
> > > >
> > > >
> > > >
> > > >
> > > > Best regards,
> > > >
> > > > Lukasz Majewski
> > > >
> > > > --
> > > >
> > > > DENX Software Engineering GmbH,      Managing Director: Wolfgang
> > > > Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194
> > > > Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax:
> > > > (+49)-8142-66989-80 Email: lukma at denx.de  
> > 
> > 
> > 
> > 
> > Best regards,
> > 
> > Lukasz Majewski
> > 
> > --
> > 
> > DENX Software Engineering GmbH,      Managing Director: Wolfgang
> > Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell,
> > Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email:
> > lukma at denx.de  




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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  reply	other threads:[~2019-05-08 22:24 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-30 10:17 [U-Boot] [i.MX8MM+CCF 00/41] i.MX8MM + CCF Peng Fan
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 01/41] clk: correct get clk_x pointer Peng Fan
2019-05-06 21:36   ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 02/41] clk: fixed-factor: fix get clk_fixed_factor Peng Fan
2019-05-06 21:41   ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 03/41] clk: introduce clk_dev_binded Peng Fan
2019-05-06 21:57   ` Lukasz Majewski
2019-05-07 13:22     ` Peng Fan
2019-05-08  7:30       ` Lukasz Majewski
2019-05-08  7:41         ` Peng Fan
2019-05-08 22:24           ` Lukasz Majewski [this message]
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 04/41] clk: use clk_dev_binded Peng Fan
2019-05-06 21:59   ` Lukasz Majewski
2019-05-08  7:27   ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 05/41] clk-provider: sync more clk flags from Linux Kernel Peng Fan
2019-05-06 22:01   ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 06/41] cmd: clk: print err value when clk_get_rate failed Peng Fan
2019-05-06 22:03   ` Lukasz Majewski
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 07/41] clk: mux: add set parent support Peng Fan
2019-05-06 22:04   ` Lukasz Majewski
2019-05-07 13:23     ` Peng Fan
2019-04-30 10:17 ` [U-Boot] [i.MX8MM+CCF 08/41] clk: export mux/divider ops Peng Fan
2019-05-06 22:06   ` Lukasz Majewski
2019-05-07 13:25     ` Peng Fan
2019-05-08  6:31       ` Lukasz Majewski
2019-05-08  6:35         ` Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 09/41] clk: add clk-gate support Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 10/41] divider set rate supporrt Peng Fan
2019-05-06 22:08   ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 11/41] clk: fixed_rate: export clk_fixed_rate Peng Fan
2019-05-06 22:15   ` Lukasz Majewski
2019-05-07 13:27     ` Peng Fan
2019-05-08  6:46       ` Lukasz Majewski
2019-05-08  6:51         ` Peng Fan
2019-05-08  7:40           ` Lukasz Majewski
2019-05-08  7:45             ` Peng Fan
2019-05-08 22:27               ` Lukasz Majewski
2019-05-09  1:13                 ` Peng Fan
2019-05-16  8:55                   ` Lukasz Majewski
2019-05-16  9:58                     ` Peng Fan
2019-05-16 10:08                       ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 12/41] clk: fixed_rate: add pre reloc flag Peng Fan
2019-05-06 22:16   ` Lukasz Majewski
2019-05-07 13:29     ` Peng Fan
2019-05-07 14:00       ` Bin Meng
2019-05-08  7:00         ` Lukasz Majewski
2019-05-08  6:57       ` Lukasz Majewski
2019-05-08  7:21         ` Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 13/41] clk: imx: import clk heplers Peng Fan
2019-05-06 22:17   ` Lukasz Majewski
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 14/41] clk: imx: gate2 add set rate Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 15/41] linux: compat: guard PAGE_SIZE Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 16/41] drivers: core: use strcmp when find device by name Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 17/41] ddr: imx8m: fix ddr firmware location when enable SPL OF Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 18/41] imx: add IMX8MQ kconfig entry Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 19/41] imx: add IMX8MM " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 20/41] imx: imx8mm: add clock bindings header Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 21/41] imx: add i.MX8MM cpu type Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 22/41] imx: spl: add spl_board_boot_device for i.MX8MM Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 23/41] imx8m: update imx-regs " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 24/41] imx: add get_cpu_rev support " Peng Fan
2019-04-30 10:18 ` [U-Boot] [i.MX8MM+CCF 25/41] imx8m: rename clock to clock_imx8mq Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 26/41] imx8m: restructure clock.h Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 27/41] imx8m: add clk support for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 28/41] imx8m: soc: probe clk before relocation Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 29/41] imx8m: add pin header for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 30/41] imx: add i.MX8MM PE property Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 31/41] imx8m: Fix MMU table issue for OPTEE memory Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 32/41] imx8m: set BYPASS ID SWAP to avoid AXI bus errors Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 33/41] imx8m: Configure trustzone region 0 for non-secure access Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 34/41] imx8m: soc: enable SCTR clock before timer init Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 35/41] serial: Kconfig: make MXC_UART usable for MX7 and IMX8M Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 36/41] clk: imx: add Kconfig entry for i.MX8MM Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 37/41] clk: imx: add pll14xx driver Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 38/41] clk: add composite clk support Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 39/41] clk: imx: add i.MX8MM " Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 40/41] clk: imx: add i.MX8MM clk driver Peng Fan
2019-04-30 10:19 ` [U-Boot] [i.MX8MM+CCF 41/41] imx: add i.MX8MM EVK board support Peng Fan
2019-05-06  7:57 ` [U-Boot] [i.MX8MM+CCF 00/41] i.MX8MM + CCF Schrempf Frieder
2019-05-06  8:26   ` Schrempf Frieder
2019-05-06  9:08     ` Peng Fan
2019-05-06  9:55       ` Lukasz Majewski
2019-05-06 21:32 ` Lukasz Majewski
2019-05-07 13:16   ` Peng Fan

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