From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andreas Dannenberg Date: Thu, 16 May 2019 15:54:50 -0500 Subject: [U-Boot] [RFC 07/11] armv7R: K3: am654: Use full malloc implementation in SPL In-Reply-To: <20190516205454.22150-1-dannenberg@ti.com> References: <20190516205454.22150-1-dannenberg@ti.com> Message-ID: <20190516205454.22150-8-dannenberg@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Switch to using the full malloc scheme in post-relocation SPL to allow better utilization of available memory for example by allowing memory to get freed. Initially allocate a 16MB-sized region in DDR starting at address 0x84000000 for this purpose. Signed-off-by: Andreas Dannenberg --- configs/am65x_evm_r5_defconfig | 1 - configs/am65x_hs_evm_r5_defconfig | 1 - include/configs/am65x_evm.h | 3 +++ 3 files changed, 3 insertions(+), 2 deletions(-) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 3814872ec7..73f614944f 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -18,7 +18,6 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_TEXT_BASE=0x41c00000 -CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index 0b12f15782..49eca7de64 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -20,7 +20,6 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_TEXT_BASE=0x41c00000 -CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_I2C_SUPPORT=y diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index cff60a8444..a90f38edc9 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -41,6 +41,9 @@ CONFIG_SPL_BSS_MAX_SIZE) /* Set the stack right below the SPL BSS section */ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_BSS_START_ADDR +/* Configure R5 SPL post-relocation malloc pool in DDR */ +#define CONFIG_SYS_SPL_MALLOC_START 0x84000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M #endif #ifdef CONFIG_SYS_K3_SPL_ATF -- 2.17.1