From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lukasz Majewski Date: Mon, 24 Jun 2019 11:56:30 +0200 Subject: [U-Boot] [PATCH v5 3/6] ARM: dts: imx: Provide 'gpio-ranges' for mxs_gpio driver In-Reply-To: <98e3aa7e-ed35-b5a6-bbb7-287c22271cca@denx.de> References: <20190619122734.10948-1-lukma@denx.de> <20190619122734.10948-4-lukma@denx.de> <5a128f9e-8c6f-c0f4-6a00-983e323faaeb@denx.de> <20190619161921.73d63c0f@jawa> <20190619165300.5967d4a5@jawa> <98e3aa7e-ed35-b5a6-bbb7-287c22271cca@denx.de> Message-ID: <20190624115630.71756d46@jawa> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, 19 Jun 2019 17:05:15 +0200 Marek Vasut wrote: > On 6/19/19 4:53 PM, Lukasz Majewski wrote: > > On Wed, 19 Jun 2019 16:32:57 +0200 > > Marek Vasut wrote: > > > >> On 6/19/19 4:19 PM, Lukasz Majewski wrote: > >>> Hi Marek, > >>> > >>>> On 6/19/19 2:27 PM, Lukasz Majewski wrote: > >>>>> Those properties are U-Boot specific as the mxs gpio Linux > >>>>> driver (up to version v5.1.11) is not supporting them. > >>>>> > >>>>> Signed-off-by: Lukasz Majewski > >>>> > >>>> [...] > >>>> > >>>>> +&gpio4 { > >>>>> + gpio-ranges = <&pinctrl 120 0 21>; > >>>> > >>>> Are you sure the GPIO controller offset is 120 here ? Shouldn't > >>>> that be 0 , while the pin controller offset should be 120 ? Some > >>>> for the others ? > >>> > >>> Please find following excerpt from the documentation [1]: > >>> > >>> The format is: <[pin controller phandle], [GPIO controller > >>> offset], [pin controller offset], [number of pins]>; > >>> > >>> Example: > >>> > >>> gpio-ranges = <&foo 0 20 10>, <&bar 10 50 20>; > >>> > >>> This means: > >>> - pins 20..29 on pin controller "foo" is mapped to GPIO line 0..9 > >>> and > >>> - pins 50..69 on pin controller "bar" is mapped to GPIO line > >>> 10..29 > >>> > >>> > >>> The 120 is the GPIO controller offset (logical one) [*] and > >>> corresponds to the final GPIO number. > >>> > >>> Then we do have the "pin controller offset" which is the pin > >>> number start index per controller (like gpio0, gpio1, gpioN). In > >>> my case it is always 0. > >> > >> I think you have these two swapped. The pin controller is the > >> super-node here, hence each GPIO block is at offset N in the pin > >> controller pin space. Each GPIO block then has GPIOs, which either > >> start from 0 or M within the GPIO block pin space (in MXS case, > >> this is always 0). > > > > Yes, correct. This shall be <&pinctrl 0 120 21> > > > > I will prepare v6. > > And update the GPIO controller driver accordingly. > Only the DTS file needs update as I'm not using those particular entries for setting up the DM gpio controller. The driver code doesn't need update. Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 488 bytes Desc: OpenPGP digital signature URL: