From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Date: Tue, 16 Jul 2019 17:27:18 +0530 Subject: [U-Boot] [PATCH v3 30/57] ram: rk3399: Map chipselect for lpddr4 In-Reply-To: <20190716115745.12585-1-jagan@amarulasolutions.com> References: <20190716115745.12585-1-jagan@amarulasolutions.com> Message-ID: <20190716115745.12585-31-jagan@amarulasolutions.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Assign desired cs_map values for lpddr4 during set memory map. Initial cs_map values is based on the sdram parameters, so the same will adjusted based dramtype as LPDDR4. Signed-off-by: Jagan Teki Signed-off-by: YouMin Chen --- drivers/ram/rockchip/sdram_rk3399.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 2ab10da53f..7689711a99 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -188,6 +188,16 @@ static void set_memory_map(const struct chan_info *chan, u32 channel, clrsetbits_le32(&denali_pi[155], (0x3 << 16) | (0x7 << 24), ((3 - sdram_ch->cap_info.bk) << 16) | ((16 - row) << 24)); + + if (IS_ENABLED(CONFIG_RAM_RK3399_LPDDR4)) { + if (cs_map == 1) + cs_map = 0x5; + else if (cs_map == 2) + cs_map = 0xa; + else + cs_map = 0xF; + } + /* PI_41 PI_CS_MAP:RW:24:4 */ clrsetbits_le32(&denali_pi[41], 0xf << 24, cs_map << 24); if (sdram_ch->cap_info.rank == 1 && params->base.dramtype == DDR3) -- 2.18.0.321.gffc6fa0e3