[U-Boot] [PATCH 0/4] MMC Fixes for dra7xx and am57xx boards

[U-Boot] [PATCH 0/4] MMC Fixes for dra7xx and am57xx boards

[Faiz Abbas]

These patches implement some MMC related fixes for dra7xx and am57xx
boards.

Faiz Abbas (4):
  ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line
    without pullup
  ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2
  ARM: dts: am57xx: Disable voltage switching for SD card
  ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values

 arch/arm/dts/am571x-idk.dts                | 10 ++----
 arch/arm/dts/am572x-idk.dts                | 10 ++----
 arch/arm/dts/am574x-idk.dts                | 15 ++++++++
 arch/arm/dts/am57xx-beagle-x15-common.dtsi |  1 +
 arch/arm/dts/am57xx-beagle-x15-revb1.dts   |  7 +---
 arch/arm/dts/am57xx-beagle-x15-revc.dts    |  7 +---
 arch/arm/dts/am57xx-idk-common.dtsi        |  1 +
 arch/arm/dts/dra7-mmc-iodelay.dtsi         | 19 ++++++++++
 arch/arm/dts/dra76x-mmc-iodelay.dtsi       | 40 +++++++++++-----------
 9 files changed, 64 insertions(+), 46 deletions(-)
 create mode 100644 arch/arm/dts/dra7-mmc-iodelay.dtsi

-- 
2.19.2

[U-Boot] [PATCH 1/4] ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup

[Faiz Abbas]

During a short period when the bus voltage is switched from 3.3v to 1.8v,
(to enumerate UHS mode), the mmc module is disabled and the mmc IO lines
are kept in a state according to the programmed pad mux pull type.

According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications
Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the
host should hold CLK low for at least 5ms.

In order to keep the card line low during voltage switch, the pad mux of
mmc1_clk line should be configured to pull down.

Add a new pinctrl group for clock line without pullup to be used in boards
where mmc1_clk line is not connected to an external pullup.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 arch/arm/dts/am571x-idk.dts        |  3 ++-
 arch/arm/dts/am572x-idk.dts        |  3 ++-
 arch/arm/dts/dra7-mmc-iodelay.dtsi | 19 +++++++++++++++++++
 3 files changed, 23 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/dra7-mmc-iodelay.dtsi

diff --git a/arch/arm/dts/am571x-idk.dts b/arch/arm/dts/am571x-idk.dts
index debf946440..eb5fda81f5 100644
--- a/arch/arm/dts/am571x-idk.dts
+++ b/arch/arm/dts/am571x-idk.dts
@@ -11,6 +11,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include "am57xx-idk-common.dtsi"
+#include "dra7-mmc-iodelay.dtsi"
 #include "dra72x-mmc-iodelay.dtsi"
 
 / {
@@ -102,7 +103,7 @@
 
 &mmc1 {
 	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
-	pinctrl-0 = <&mmc1_pins_default>;
+	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
 	pinctrl-1 = <&mmc1_pins_hs>;
 	pinctrl-2 = <&mmc1_pins_sdr12>;
 	pinctrl-3 = <&mmc1_pins_sdr25>;
diff --git a/arch/arm/dts/am572x-idk.dts b/arch/arm/dts/am572x-idk.dts
index 9212931f25..2247948553 100644
--- a/arch/arm/dts/am572x-idk.dts
+++ b/arch/arm/dts/am572x-idk.dts
@@ -11,6 +11,7 @@
 #include "dra74x.dtsi"
 #include "am572x-idk-common.dtsi"
 #include "am57xx-idk-common.dtsi"
+#include "dra7-mmc-iodelay.dtsi"
 #include "dra74x-mmc-iodelay.dtsi"
 
 / {
@@ -21,7 +22,7 @@
 
 &mmc1 {
 	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
-	pinctrl-0 = <&mmc1_pins_default>;
+	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
 	pinctrl-1 = <&mmc1_pins_hs>;
 	pinctrl-2 = <&mmc1_pins_sdr12>;
 	pinctrl-3 = <&mmc1_pins_sdr25>;
diff --git a/arch/arm/dts/dra7-mmc-iodelay.dtsi b/arch/arm/dts/dra7-mmc-iodelay.dtsi
new file mode 100644
index 0000000000..4acc215ba3
--- /dev/null
+++ b/arch/arm/dts/dra7-mmc-iodelay.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * MMC IOdelay values for TI's DRA7xx SoCs.
+ * Copyright (C) 2019 Texas Instruments
+ * Author: Faiz Abbas <faiz_abbas@ti.com>
+ */
+
+&dra7_pmx_core {
+	mmc1_pins_default_no_clk_pu: mmc1_pins_default_no_clk_pu {
+		pinctrl-single,pins = <
+			DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
+			DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
+			DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
+			DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
+			DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
+			DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
+		>;
+	};
+};
-- 
2.19.2

[U-Boot] [PATCH 2/4] ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2

[Faiz Abbas]

Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an
issue where mmc2 (eMMC) was coming up in HS52 mode instead of the
highest DDR52 mode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 arch/arm/dts/am574x-idk.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/dts/am574x-idk.dts b/arch/arm/dts/am574x-idk.dts
index 41e12a382d..0de73616b5 100644
--- a/arch/arm/dts/am574x-idk.dts
+++ b/arch/arm/dts/am574x-idk.dts
@@ -7,6 +7,8 @@
 /dts-v1/;
 
 #include "dra76x.dtsi"
+#include "dra7-mmc-iodelay.dtsi"
+#include "dra76x-mmc-iodelay.dtsi"
 #include "am572x-idk-common.dtsi"
 
 / {
@@ -20,3 +22,16 @@
 		spi-max-frequency = <96000000>;
 	};
 };
+
+&mmc1 {
+	pinctrl-names = "default", "hs";
+	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
+	pinctrl-1 = <&mmc1_pins_hs>;
+};
+
+&mmc2 {
+	pinctrl-names = "default", "hs", "ddr_1_8v";
+	pinctrl-0 = <&mmc2_pins_default>;
+	pinctrl-1 = <&mmc2_pins_default>;
+	pinctrl-2 = <&mmc2_pins_default>;
+};
-- 
2.19.2

[U-Boot] [PATCH 3/4] ARM: dts: am57xx: Disable voltage switching for SD card

[Faiz Abbas]

If UHS speed modes are enabled, a compatible SD card switches down to 1.8V
during enumeration. If after this a software reboot/crash takes place and
on-chip ROM tries to enumerate the SD card, the difference in
IO voltages (host @ 3.3V and card @ 1.8V) may end up damaging the card.

The fix for this is to have support for power cycling the card in
hardware (with a PORz/soft-reset line causing a power cycle of the card).
Because the beaglebone X15 (rev A,B and C), am57xx-evms and am57xx-idks don't
have this capability, disable voltage switching for these boards.

The major effect of this is that the maximum supported speed mode is now
high speed(50 MHz) down from SDR104(200 MHz).

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 arch/arm/dts/am571x-idk.dts                | 7 +------
 arch/arm/dts/am572x-idk.dts                | 7 +------
 arch/arm/dts/am57xx-beagle-x15-common.dtsi | 1 +
 arch/arm/dts/am57xx-beagle-x15-revb1.dts   | 7 +------
 arch/arm/dts/am57xx-beagle-x15-revc.dts    | 7 +------
 arch/arm/dts/am57xx-idk-common.dtsi        | 1 +
 6 files changed, 6 insertions(+), 24 deletions(-)

diff --git a/arch/arm/dts/am571x-idk.dts b/arch/arm/dts/am571x-idk.dts
index eb5fda81f5..798fbfe19d 100644
--- a/arch/arm/dts/am571x-idk.dts
+++ b/arch/arm/dts/am571x-idk.dts
@@ -102,14 +102,9 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
+	pinctrl-names = "default", "hs";
 	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
 	pinctrl-1 = <&mmc1_pins_hs>;
-	pinctrl-2 = <&mmc1_pins_sdr12>;
-	pinctrl-3 = <&mmc1_pins_sdr25>;
-	pinctrl-4 = <&mmc1_pins_sdr50>;
-	pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
-	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
 };
 
 &mmc2 {
diff --git a/arch/arm/dts/am572x-idk.dts b/arch/arm/dts/am572x-idk.dts
index 2247948553..42e88c1bc0 100644
--- a/arch/arm/dts/am572x-idk.dts
+++ b/arch/arm/dts/am572x-idk.dts
@@ -21,14 +21,9 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
+	pinctrl-names = "default", "hs";
 	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
 	pinctrl-1 = <&mmc1_pins_hs>;
-	pinctrl-2 = <&mmc1_pins_sdr12>;
-	pinctrl-3 = <&mmc1_pins_sdr25>;
-	pinctrl-4 = <&mmc1_pins_sdr50>;
-	pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
-	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
 };
 
 &mmc2 {
diff --git a/arch/arm/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/dts/am57xx-beagle-x15-common.dtsi
index 49aeecd312..d6b94d528f 100644
--- a/arch/arm/dts/am57xx-beagle-x15-common.dtsi
+++ b/arch/arm/dts/am57xx-beagle-x15-common.dtsi
@@ -433,6 +433,7 @@
 
 	bus-width = <4>;
 	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
+	no-1-8-v;
 };
 
 &mmc2 {
diff --git a/arch/arm/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/dts/am57xx-beagle-x15-revb1.dts
index 5a77b33492..34c6996582 100644
--- a/arch/arm/dts/am57xx-beagle-x15-revb1.dts
+++ b/arch/arm/dts/am57xx-beagle-x15-revb1.dts
@@ -19,14 +19,9 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
+	pinctrl-names = "default", "hs";
 	pinctrl-0 = <&mmc1_pins_default>;
 	pinctrl-1 = <&mmc1_pins_hs>;
-	pinctrl-2 = <&mmc1_pins_sdr12>;
-	pinctrl-3 = <&mmc1_pins_sdr25>;
-	pinctrl-4 = <&mmc1_pins_sdr50>;
-	pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
-	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
 	vmmc-supply = <&vdd_3v3>;
 	vqmmc-supply = <&ldo1_reg>;
 };
diff --git a/arch/arm/dts/am57xx-beagle-x15-revc.dts b/arch/arm/dts/am57xx-beagle-x15-revc.dts
index 17c41da3b5..ccd99160bb 100644
--- a/arch/arm/dts/am57xx-beagle-x15-revc.dts
+++ b/arch/arm/dts/am57xx-beagle-x15-revc.dts
@@ -19,14 +19,9 @@
 };
 
 &mmc1 {
-	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
+	pinctrl-names = "default", "hs";
 	pinctrl-0 = <&mmc1_pins_default>;
 	pinctrl-1 = <&mmc1_pins_hs>;
-	pinctrl-2 = <&mmc1_pins_sdr12>;
-	pinctrl-3 = <&mmc1_pins_sdr25>;
-	pinctrl-4 = <&mmc1_pins_sdr50>;
-	pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
-	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
 	vmmc-supply = <&vdd_3v3>;
 	vqmmc-supply = <&ldo1_reg>;
 };
diff --git a/arch/arm/dts/am57xx-idk-common.dtsi b/arch/arm/dts/am57xx-idk-common.dtsi
index fa5a078b27..fdb4e0e47c 100644
--- a/arch/arm/dts/am57xx-idk-common.dtsi
+++ b/arch/arm/dts/am57xx-idk-common.dtsi
@@ -405,6 +405,7 @@
 	vqmmc-supply = <&ldo1_reg>;
 	bus-width = <4>;
 	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
+	no-1-8-v;
 };
 
 &mmc2 {
-- 
2.19.2

[U-Boot] [PATCH 4/4] ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values

[Faiz Abbas]

Update the MMC2_HS200_MANUAL1 iodelay values to match with the latest
dra76x data manual[1].

Also this particular pinctrl-array is using spaces instead of tabs for
spacing between the values and the comments. Fix this as well.

[1] http://www.ti.com/lit/ds/symlink/dra76p.pdf

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
---
 arch/arm/dts/dra76x-mmc-iodelay.dtsi | 40 ++++++++++++++--------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/arm/dts/dra76x-mmc-iodelay.dtsi b/arch/arm/dts/dra76x-mmc-iodelay.dtsi
index baba7b00ec..fdca481869 100644
--- a/arch/arm/dts/dra76x-mmc-iodelay.dtsi
+++ b/arch/arm/dts/dra76x-mmc-iodelay.dtsi
@@ -22,7 +22,7 @@
  *
  * Datamanual Revisions:
  *
- * DRA76x Silicon Revision 1.0: SPRS993A, Revised July 2017
+ * DRA76x Silicon Revision 1.0: SPRS993E, Revised December 2018
  *
  */
 
@@ -169,25 +169,25 @@
 	/* Corresponds to MMC2_HS200_MANUAL1 in datamanual */
 	mmc2_iodelay_hs200_conf: mmc2_iodelay_hs200_conf {
 		pinctrl-pin-array = <
-			0x190 A_DELAY_PS(384) G_DELAY_PS(0)       /* CFG_GPMC_A19_OEN */
-			0x194 A_DELAY_PS(0) G_DELAY_PS(174)       /* CFG_GPMC_A19_OUT */
-			0x1a8 A_DELAY_PS(410) G_DELAY_PS(0)       /* CFG_GPMC_A20_OEN */
-			0x1ac A_DELAY_PS(85) G_DELAY_PS(0)        /* CFG_GPMC_A20_OUT */
-			0x1b4 A_DELAY_PS(468) G_DELAY_PS(0)       /* CFG_GPMC_A21_OEN */
-			0x1b8 A_DELAY_PS(139) G_DELAY_PS(0)       /* CFG_GPMC_A21_OUT */
-			0x1c0 A_DELAY_PS(676) G_DELAY_PS(0)       /* CFG_GPMC_A22_OEN */
-			0x1c4 A_DELAY_PS(69) G_DELAY_PS(0)        /* CFG_GPMC_A22_OUT */
-			0x1d0 A_DELAY_PS(1062) G_DELAY_PS(154)	  /* CFG_GPMC_A23_OUT */
-			0x1d8 A_DELAY_PS(640) G_DELAY_PS(0)       /* CFG_GPMC_A24_OEN */
-			0x1dc A_DELAY_PS(0) G_DELAY_PS(0)         /* CFG_GPMC_A24_OUT */
-			0x1e4 A_DELAY_PS(356) G_DELAY_PS(0)       /* CFG_GPMC_A25_OEN */
-			0x1e8 A_DELAY_PS(0) G_DELAY_PS(0)         /* CFG_GPMC_A25_OUT */
-			0x1f0 A_DELAY_PS(579) G_DELAY_PS(0)       /* CFG_GPMC_A26_OEN */
-			0x1f4 A_DELAY_PS(0) G_DELAY_PS(0)         /* CFG_GPMC_A26_OUT */
-			0x1fc A_DELAY_PS(435) G_DELAY_PS(0)       /* CFG_GPMC_A27_OEN */
-			0x200 A_DELAY_PS(36) G_DELAY_PS(0)        /* CFG_GPMC_A27_OUT */
-			0x364 A_DELAY_PS(759) G_DELAY_PS(0)       /* CFG_GPMC_CS1_OEN */
-			0x368 A_DELAY_PS(72) G_DELAY_PS(0)        /* CFG_GPMC_CS1_OUT */
+			0x190 A_DELAY_PS(384) G_DELAY_PS(0)	/* CFG_GPMC_A19_OEN */
+			0x194 A_DELAY_PS(350) G_DELAY_PS(174)	/* CFG_GPMC_A19_OUT */
+			0x1a8 A_DELAY_PS(410) G_DELAY_PS(0)	/* CFG_GPMC_A20_OEN */
+			0x1ac A_DELAY_PS(335) G_DELAY_PS(0)	/* CFG_GPMC_A20_OUT */
+			0x1b4 A_DELAY_PS(468) G_DELAY_PS(0)	/* CFG_GPMC_A21_OEN */
+			0x1b8 A_DELAY_PS(339) G_DELAY_PS(0)	/* CFG_GPMC_A21_OUT */
+			0x1c0 A_DELAY_PS(676) G_DELAY_PS(0)	/* CFG_GPMC_A22_OEN */
+			0x1c4 A_DELAY_PS(219) G_DELAY_PS(0)	/* CFG_GPMC_A22_OUT */
+			0x1d0 A_DELAY_PS(1062) G_DELAY_PS(154)	/* CFG_GPMC_A23_OUT */
+			0x1d8 A_DELAY_PS(640) G_DELAY_PS(0)	/* CFG_GPMC_A24_OEN */
+			0x1dc A_DELAY_PS(150) G_DELAY_PS(0)	/* CFG_GPMC_A24_OUT */
+			0x1e4 A_DELAY_PS(356) G_DELAY_PS(0)	/* CFG_GPMC_A25_OEN */
+			0x1e8 A_DELAY_PS(150) G_DELAY_PS(0)	/* CFG_GPMC_A25_OUT */
+			0x1f0 A_DELAY_PS(579) G_DELAY_PS(0)	/* CFG_GPMC_A26_OEN */
+			0x1f4 A_DELAY_PS(200) G_DELAY_PS(0)	/* CFG_GPMC_A26_OUT */
+			0x1fc A_DELAY_PS(435) G_DELAY_PS(0)	/* CFG_GPMC_A27_OEN */
+			0x200 A_DELAY_PS(236) G_DELAY_PS(0)	/* CFG_GPMC_A27_OUT */
+			0x364 A_DELAY_PS(759) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OEN */
+			0x368 A_DELAY_PS(372) G_DELAY_PS(0)	/* CFG_GPMC_CS1_OUT */
 	      >;
 	};
 
-- 
2.19.2

[U-Boot] [PATCH 1/4] ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup

[Tom Rini]

On Thu, Jun 20, 2019 at 03:07:19PM +0530, Faiz Abbas wrote:

> During a short period when the bus voltage is switched from 3.3v to 1.8v,
> (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines
> are kept in a state according to the programmed pad mux pull type.
> 
> According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications
> Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the
> host should hold CLK low for at least 5ms.
> 
> In order to keep the card line low during voltage switch, the pad mux of
> mmc1_clk line should be configured to pull down.
> 
> Add a new pinctrl group for clock line without pullup to be used in boards
> where mmc1_clk line is not connected to an external pullup.
> 
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [PATCH 2/4] ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2

[Tom Rini]

On Thu, Jun 20, 2019 at 03:07:20PM +0530, Faiz Abbas wrote:

> Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an
> issue where mmc2 (eMMC) was coming up in HS52 mode instead of the
> highest DDR52 mode.
> 
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [PATCH 3/4] ARM: dts: am57xx: Disable voltage switching for SD card

[Tom Rini]

On Thu, Jun 20, 2019 at 03:07:21PM +0530, Faiz Abbas wrote:

> If UHS speed modes are enabled, a compatible SD card switches down to 1.8V
> during enumeration. If after this a software reboot/crash takes place and
> on-chip ROM tries to enumerate the SD card, the difference in
> IO voltages (host @ 3.3V and card @ 1.8V) may end up damaging the card.
> 
> The fix for this is to have support for power cycling the card in
> hardware (with a PORz/soft-reset line causing a power cycle of the card).
> Because the beaglebone X15 (rev A,B and C), am57xx-evms and am57xx-idks don't
> have this capability, disable voltage switching for these boards.
> 
> The major effect of this is that the maximum supported speed mode is now
> high speed(50 MHz) down from SDR104(200 MHz).
> 
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [PATCH 4/4] ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values

[Tom Rini]

On Thu, Jun 20, 2019 at 03:07:22PM +0530, Faiz Abbas wrote:

> Update the MMC2_HS200_MANUAL1 iodelay values to match with the latest
> dra76x data manual[1].
> 
> Also this particular pinctrl-array is using spaces instead of tabs for
> spacing between the values and the comments. Fix this as well.
> 
> [1] http://www.ti.com/lit/ds/symlink/dra76p.pdf
> 
> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

Applied to u-boot/master, thanks!

-- 
Tom
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