From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Fri, 9 Aug 2019 11:30:21 -0400 Subject: [U-Boot] [PATCH 0/3] Intel FPGA PCIe fixes In-Reply-To: References: <1558665000-3037-1-git-send-email-ley.foon.tan@intel.com> Message-ID: <20190809153021.GE2718@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Fri, Aug 09, 2019 at 05:04:43PM +0800, Ley Foon Tan wrote: > On Tue, Jun 11, 2019 at 8:30 AM Ley Foon Tan wrote: > > > > On Fri, May 24, 2019 at 10:30 AM Ley Foon Tan wrote: > > > > > > This patchset fix issues in Intel FPGA PCIe driver. > > > - Fix TLP polling timeout > > > - Fix enumerating mult-function PCIe device issue > > > - Fix PCIe switch read config register issue > > > > > > Ley Foon Tan (3): > > > pci: intel: Increase TLP polling counter > > > pci: intel: Fix error when enumerating multi-function PCIe device > > > pci: intel: Fix configuration type based on secondary number > > > > > > drivers/pci/pcie_intel_fpga.c | 18 +++++++++++------- > > > 1 file changed, 11 insertions(+), 7 deletions(-) > > Any comment on these patches? > > > > Thanks > Hi Tom and Michal > > Can you help to merge these patches? I saw these as "FPGA" and gave them to Michal, in patchwork. And I know he's digging out from a vacation backlog. Looking at the patches themselves, I can see they're more "PCI" than anything else, I'll put them in my queue. Thanks for the reminder! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: