From mboxrd@z Thu Jan  1 00:00:00 1970
From: Tom Rini <trini@konsulko.com>
Date: Tue, 13 Aug 2019 12:52:27 -0400
Subject: [U-Boot] [PATCH 1/3] pci: intel: Increase TLP polling counter
In-Reply-To: <1558665000-3037-2-git-send-email-ley.foon.tan@intel.com>
References: <1558665000-3037-1-git-send-email-ley.foon.tan@intel.com>
 <1558665000-3037-2-git-send-email-ley.foon.tan@intel.com>
Message-ID: <20190813165227.GW2718@bill-the-cat>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On Fri, May 24, 2019 at 10:29:58AM +0800, Ley Foon Tan wrote:

> Some PCIe devices require longer time to response.
> Increase polling counter to 20000 (~100ms).
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

Applied to u-boot/master, thanks!

-- 
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: not available
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20190813/5860bb37/attachment.sig>