From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] Pull request: u-boot-riscv/master
Date: Tue, 3 Sep 2019 20:58:44 -0400 [thread overview]
Message-ID: <20190904005844.GK26850@bill-the-cat> (raw)
In-Reply-To: <8db06c7a-65ba-451b-9b87-67363fd3a541@ATCPCS12.andestech.com>
On Tue, Sep 03, 2019 at 10:15:42AM +0800, uboot at andestech.com wrote:
> Hi Tom,
>
> Please pull some riscv updates:
>
> - Skip unavailable hart in the get_count().
> - fu540 set serial env from otp.
> - fu540 add mmc0 as a boot target device.
> - Update fix_rela_dyn and add absolute reloc addend.
> - Andestech PLIC driver will skip unavailable hart.
> - Support Andestech V5L2 cache driver.
>
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/579707002
>
> Thanks
> Rick
>
>
> The following changes since commit d22c8be964a870f59d2fdab6c67cefa0c4799364:
>
> Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-09-01 13:33:12 -0400)
>
> are available in the Git repository at:
>
> git at gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
>
> for you to fetch changes up to 61ce84b2cf1a6672c8e402ce8174554b25629692:
>
> riscv: cache: use CCTL to flush d-cache (2019-09-03 09:31:03 +0800)
>
Applied to u-boot/master, thanks!
--
Tom
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next prev parent reply other threads:[~2019-09-04 0:58 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 2:15 [U-Boot] Pull request: u-boot-riscv/master uboot at andestech.com
2019-09-04 0:58 ` Tom Rini [this message]
-- strict thread matches above, loose matches on Subject: below --
2020-07-02 2:51 uboot at andestech.com
2020-07-02 13:53 ` Tom Rini
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA47207DF@ATCPCS16.andestech.com>
2020-07-03 6:01 ` Rick Chen
2020-07-03 6:52 ` Bin Meng
2020-06-24 2:30 uboot at andestech.com
2020-06-24 2:57 ` Bin Meng
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA471C57A@ATCPCS16.andestech.com>
2020-06-24 3:13 ` Rick Chen
2020-06-04 2:18 uboot at andestech.com
2020-06-04 18:47 ` Tom Rini
2020-05-26 8:31 uboot at andestech.com
2020-05-26 19:55 ` Tom Rini
2020-05-25 8:01 uboot at andestech.com
2020-05-25 15:40 ` Tom Rini
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA470F21C@ATCPCS16.andestech.com>
2020-05-26 7:41 ` Rick Chen
2020-06-22 6:03 ` Rick Chen
2020-06-23 0:45 ` Tom Rini
2020-06-23 2:05 ` Rick Chen
2020-06-24 1:31 ` Rick Chen
2020-06-24 3:37 ` Sean Anderson
2020-04-23 8:25 uboot at andestech.com
2020-04-23 20:50 ` Tom Rini
2020-03-17 8:03 uboot at andestech.com
2020-03-18 13:56 ` Tom Rini
2020-02-10 7:29 uboot at andestech.com
2020-02-10 13:09 ` Tom Rini
2019-12-10 1:05 uboot at andestech.com
2019-12-10 4:01 ` Tom Rini
2019-10-18 7:00 uboot at andestech.com
2019-10-19 14:24 ` Tom Rini
2019-08-26 8:25 uboot at andestech.com
2019-08-27 0:17 ` Tom Rini
2019-08-16 5:19 uboot at andestech.com
2019-08-17 17:47 ` Tom Rini
2019-08-12 10:23 uboot at andestech.com
2019-08-13 16:50 ` Tom Rini
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA40FF880@ATCPCS16.andestech.com>
2019-08-14 2:20 ` Rick Chen
2019-08-14 20:15 ` Auer, Lukas
2019-08-20 21:11 ` Auer, Lukas
2019-08-21 2:10 ` Rick Chen
2019-07-19 7:06 uboot at andestech.com
2019-07-23 13:46 ` Tom Rini
2019-06-05 10:27 uboot at andestech.com
2019-06-05 14:24 ` Tom Rini
2019-05-09 9:08 uboot at andestech.com
2019-05-09 22:25 ` Tom Rini
2019-04-08 6:46 uboot at andestech.com
2019-04-09 16:10 ` Tom Rini
2019-02-27 5:39 uboot at andestech.com
2019-02-28 3:59 ` Tom Rini
2019-01-15 7:16 uboot at andestech.com
2019-01-16 17:11 ` Tom Rini
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