* [U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
@ 2019-11-20 21:36 Marek Vasut
2019-11-21 10:11 ` Tan, Ley Foon
2019-11-21 10:29 ` Simon Goldschmidt
0 siblings, 2 replies; 4+ messages in thread
From: Marek Vasut @ 2019-11-20 21:36 UTC (permalink / raw)
To: u-boot
The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
between each SPL image. Generate U-Boot image with such a padding using
this new target.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
---
Makefile | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/Makefile b/Makefile
index 7485bc2594..d3038cf665 100644
--- a/Makefile
+++ b/Makefile
@@ -1476,6 +1476,17 @@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
u-boot.img > $@ || rm -f $@
u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
$(call if_changed,socboot)
+
+quiet_cmd_socnandboot = SOCNANDBOOT $@
+cmd_socnandboot = dd if=/dev/zero of=spl/u-boot-spl.pad bs=64 count=1024 ; \
+ cat spl/u-boot-spl.sfp spl/u-boot-spl.pad \
+ spl/u-boot-spl.sfp spl/u-boot-spl.pad \
+ spl/u-boot-spl.sfp spl/u-boot-spl.pad \
+ spl/u-boot-spl.sfp spl/u-boot-spl.pad \
+ u-boot.img > $@ || rm -f $@ spl/u-boot-spl.pad
+u-boot-with-nand-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
+ $(call if_changed,socnandboot)
+
endif
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
--
2.24.0.432.g9d3f5f5b63
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
2019-11-20 21:36 [U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target Marek Vasut
@ 2019-11-21 10:11 ` Tan, Ley Foon
2019-11-21 10:29 ` Simon Goldschmidt
1 sibling, 0 replies; 4+ messages in thread
From: Tan, Ley Foon @ 2019-11-21 10:11 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: Marek Vasut <marex@denx.de>
> Sent: Thursday, November 21, 2019 5:37 AM
> To: u-boot at lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; See, Chin Liang
> <chin.liang.see@intel.com>; Dalon Westergreen <dwesterg@gmail.com>;
> Dinh Nguyen <dinguyen@kernel.org>; Tan, Ley Foon
> <ley.foon.tan@intel.com>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>
> Subject: [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
>
> The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
> between each SPL image. Generate U-Boot image with such a padding using
> this new target.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <chin.liang.see@intel.com>
> Cc: Dalon Westergreen <dwesterg@gmail.com>
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Regards
Ley Foon
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
2019-11-20 21:36 [U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target Marek Vasut
2019-11-21 10:11 ` Tan, Ley Foon
@ 2019-11-21 10:29 ` Simon Goldschmidt
2019-11-21 10:34 ` Marek Vasut
1 sibling, 1 reply; 4+ messages in thread
From: Simon Goldschmidt @ 2019-11-21 10:29 UTC (permalink / raw)
To: u-boot
On Wed, Nov 20, 2019 at 10:36 PM Marek Vasut <marex@denx.de> wrote:
>
> The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
> between each SPL image. Generate U-Boot image with such a padding using
> this new target.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <chin.liang.see@intel.com>
> Cc: Dalon Westergreen <dwesterg@gmail.com>
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
> Makefile | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/Makefile b/Makefile
> index 7485bc2594..d3038cf665 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1476,6 +1476,17 @@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
> u-boot.img > $@ || rm -f $@
> u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
> $(call if_changed,socboot)
> +
> +quiet_cmd_socnandboot = SOCNANDBOOT $@
> +cmd_socnandboot = dd if=/dev/zero of=spl/u-boot-spl.pad bs=64 count=1024 ; \
There's already a file 'spl/u-boot-spl-pad.bin' which is used for reserving
bss between spl binary and dtb. Could we use a more speaking name here?
Regards,
Simon
> + cat spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> + spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> + spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> + spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> + u-boot.img > $@ || rm -f $@ spl/u-boot-spl.pad
> +u-boot-with-nand-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
> + $(call if_changed,socnandboot)
> +
> endif
>
> ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
> --
> 2.24.0.432.g9d3f5f5b63
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
2019-11-21 10:29 ` Simon Goldschmidt
@ 2019-11-21 10:34 ` Marek Vasut
0 siblings, 0 replies; 4+ messages in thread
From: Marek Vasut @ 2019-11-21 10:34 UTC (permalink / raw)
To: u-boot
On 11/21/19 11:29 AM, Simon Goldschmidt wrote:
> On Wed, Nov 20, 2019 at 10:36 PM Marek Vasut wrote:
>>
>> The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
>> between each SPL image. Generate U-Boot image with such a padding using
>> this new target.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Chin Liang See <chin.liang.see@intel.com>
>> Cc: Dalon Westergreen <dwesterg@gmail.com>
>> Cc: Dinh Nguyen <dinguyen@kernel.org>
>> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
>> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
>> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
>> ---
>> Makefile | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/Makefile b/Makefile
>> index 7485bc2594..d3038cf665 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -1476,6 +1476,17 @@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
>> u-boot.img > $@ || rm -f $@
>> u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
>> $(call if_changed,socboot)
>> +
>> +quiet_cmd_socnandboot = SOCNANDBOOT $@
>> +cmd_socnandboot = dd if=/dev/zero of=spl/u-boot-spl.pad bs=64 count=1024 ; \
>
> There's already a file 'spl/u-boot-spl-pad.bin' which is used for reserving
> bss between spl binary and dtb. Could we use a more speaking name here?
Like what would you propose ?
^ permalink raw reply [flat|nested] 4+ messages in thread
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2019-11-20 21:36 [U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target Marek Vasut
2019-11-21 10:11 ` Tan, Ley Foon
2019-11-21 10:29 ` Simon Goldschmidt
2019-11-21 10:34 ` Marek Vasut
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