From mboxrd@z Thu Jan 1 00:00:00 1970 From: Fabio Estevam Date: Wed, 11 Dec 2019 17:37:09 -0300 Subject: [PATCH] imx8m: ddr_init: Move ddr_init() messages to debug level Message-ID: <20191211203709.26478-1-festevam@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Currently inside ddr_init() there is a mix of printf() and debug() level messages. Since this type of information is useful for debug purposes, convert all of them to debug level for consistency. Signed-off-by: Fabio Estevam --- drivers/ddr/imx/imx8m/ddr_init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c index d6e915c9b9..21af66e4e7 100644 --- a/drivers/ddr/imx/imx8m/ddr_init.c +++ b/drivers/ddr/imx/imx8m/ddr_init.c @@ -24,7 +24,7 @@ void ddr_init(struct dram_timing_info *dram_timing) { unsigned int tmp, initial_drate, target_freq; - printf("DDRINFO: start DRAM init\n"); + debug("DDRINFO: start DRAM init\n"); /* Step1: Follow the power up procedure */ if (is_imx8mq()) { @@ -109,7 +109,7 @@ void ddr_init(struct dram_timing_info *dram_timing) tmp = reg32_read(DDRPHY_CalBusy(0)); } while ((tmp & 0x1)); - printf("DDRINFO:ddrphy calibration done\n"); + debug("DDRINFO:ddrphy calibration done\n"); /* Step15: Set SWCTL.sw_done to 0 */ reg32_write(DDRC_SWCTL(0), 0x00000000); @@ -161,7 +161,7 @@ void ddr_init(struct dram_timing_info *dram_timing) /* enable port 0 */ reg32_write(DDRC_PCTRL_0(0), 0x00000001); - printf("DDRINFO: ddrmix config done\n"); + debug("DDRINFO: ddrmix config done\n"); /* save the dram timing config into memory */ dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE); -- 2.17.1