question: mx7ulp - LDO_ENABLED_MODE

[Jorge Ramirez-Ortiz, Gmail <jorge.ramirez.ortiz@gmail.com>]

On 17/01/20 10:26:11, Fabio Estevam wrote:
> Hi Jorge,
> 
> On Thu, Jan 16, 2020 at 5:30 PM Jorge Ramirez-Ortiz, Foundries
> <jorge@foundries.io> wrote:
> >
> > Hi Fabio,
> >
> > I am trying to enable LDO in an imx7ulp based board but somehow the
> > board locks up as soon I  write to PMC1_RUN (using the init_ldo_mode
> > sequence).
> >
> > I think it is interesting that bit PMC0_CTRL_PMC1ON is already set so
> > I am wondering if you think it is possible - in your experience- that
> > ROM might have already configured LDO? or was this also the case -
> > this bit already set- when you tested the feature?
> >
> > I also noticed that if I dont execute the init_ldo_mode sequence and
> > just check for the LODEN bit [see snipet below], this is already set
> > which too seems strange.
> 
> On a i.MX7ULP Embedded Artists board I noticed that LDOEN bit comes
> set after POR too.
> 
> Should we do something like this to avoid re-initializing the PMC1?
> 
> --- a/arch/arm/mach-imx/mx7ulp/soc.c
> +++ b/arch/arm/mach-imx/mx7ulp/soc.c
> @@ -122,6 +122,9 @@ static void init_ldo_mode(void)
>  {
>         unsigned int reg;
> 
> +       if (ldo_mode_is_enabled())
> +               return;
> +
>         /* Set LDOOKDIS */
>         setbits_le32(PMC0_BASE_ADDR + PMC0_CTRL, PMC0_CTRL_LDOOKDIS);

btw was checking the TRM manual (Chapter 28, PMC - page 1172)

[..]
PMC1 power mode[LDOVL] fields don’t necessarily satisfy the operation voltage levels
required by the system. Such operation voltage requirements can be found on i.MX 7ULP
Data Sheet. In this sense, no power transition should be performed before ensuring the
mentioned register fields are matching the required operation voltage levels expressed on
the data sheet.

=>  0.95V in the ldt_init function, is it in the data sheet?
I just cant find that particular document