[U-Boot] [PATCH] arm: zynq: zybo z7: fix MIO init issue

[U-Boot] [PATCH] arm: zynq: zybo z7: fix MIO init issue

[Luis Araneda]

From: Milan Obuch <u-boot@dino.sk>

The board has two push button connected to MIO pins
50 and 51, which have a pull-down resistor and are
connected to 1.8V when pressed.

These two pins are wrongly initialized with internal
pull-up enabled so they are reported as 1 all the time
with no change when pressed.

Disable the internal pull-up to fix the issue.

Signed-off-by: Milan Obuch <u-boot@dino.sk>
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
---

This changes were originally sent by Milan Obuch using a diff format.
As he didn't know how to properly send git patches to the mailing list,
I converted them to a git commit, rephrased the commit message and added
the Signed-off-by tags.

Milan Obuch then review and approved the current state of the patch.

Tested on a zybo z7-20 board by me

 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
index 7c6bc9fa3f..a376ba574e 100644
--- a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
+++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
@@ -219,8 +219,8 @@ static unsigned long ps7_mio_init_data_3_0[] = {
 	EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U),
 	EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U),
 	EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U),
-	EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U),
-	EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U),
+	EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00000200U),
+	EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00000200U),
 	EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U),
 	EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U),
 	EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U),
-- 
2.25.0

[U-Boot] [PATCH] arm: zynq: zybo z7: fix MIO init issue

[Michal Simek]

On 20. 01. 20 2:33, Luis Araneda wrote:
> From: Milan Obuch <u-boot@dino.sk>
> 
> The board has two push button connected to MIO pins
> 50 and 51, which have a pull-down resistor and are
> connected to 1.8V when pressed.
> 
> These two pins are wrongly initialized with internal
> pull-up enabled so they are reported as 1 all the time
> with no change when pressed.
> 
> Disable the internal pull-up to fix the issue.
> 
> Signed-off-by: Milan Obuch <u-boot@dino.sk>
> Signed-off-by: Luis Araneda <luaraneda@gmail.com>
> ---
> 
> This changes were originally sent by Milan Obuch using a diff format.
> As he didn't know how to properly send git patches to the mailing list,
> I converted them to a git commit, rephrased the commit message and added
> the Signed-off-by tags.
> 
> Milan Obuch then review and approved the current state of the patch.
> 
> Tested on a zybo z7-20 board by me
> 
>  board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
> index 7c6bc9fa3f..a376ba574e 100644
> --- a/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
> +++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
> @@ -219,8 +219,8 @@ static unsigned long ps7_mio_init_data_3_0[] = {
>  	EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U),
>  	EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U),
>  	EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U),
> -	EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U),
> -	EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U),
> +	EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00000200U),
> +	EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00000200U),
>  	EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U),
>  	EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U),
>  	EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U),
> 

Applied.
M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs


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