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From: Giulio Benetti <giulio.benetti@benettiengineering.com>
To: u-boot@lists.denx.de
Subject: [PATCH 3/5] ARM: dts: imxrt1020: add dtsi file
Date: Tue, 18 Feb 2020 20:02:53 +0100	[thread overview]
Message-ID: <20200218190255.90796-4-giulio.benetti@benettiengineering.com> (raw)
In-Reply-To: <20200218190255.90796-1-giulio.benetti@benettiengineering.com>

Add dtsi file for i.MXRT1020.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
 arch/arm/dts/imxrt1020.dtsi | 133 ++++++++++++++++++++++++++++++++++++
 1 file changed, 133 insertions(+)
 create mode 100644 arch/arm/dts/imxrt1020.dtsi

diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi
new file mode 100644
index 0000000000..97f3cec9f3
--- /dev/null
+++ b/arch/arm/dts/imxrt1020.dtsi
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
+ */
+
+#include "armv7-m.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/imxrt1020-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/memory/imxrt-sdram.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		gpio0 = &gpio1;
+		gpio1 = &gpio2;
+		gpio2 = &gpio3;
+		mmc0 = &usdhc1;
+		serial0 = &lpuart1;
+	};
+
+	clocks {
+		u-boot,dm-spl;
+		ckil {
+			compatible = "fsl,imx-ckil", "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+		};
+
+		ckih1 {
+			compatible = "fsl,imx-ckih1", "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <0>;
+		};
+
+		osc {
+			u-boot,dm-spl;
+			compatible = "fsl,imx-osc", "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+		};
+	};
+
+	soc {
+		u-boot,dm-spl;
+
+		semc: semc at 402f0000 {
+			u-boot,dm-spl;
+			compatible = "fsl,imxrt-semc";
+			reg = <0x402f0000 0x4000>;
+			clocks = <&clks IMXRT1020_CLK_SEMC>;
+			pinctrl-0 = <&pinctrl_semc>;
+			pinctrl-names = "default";
+			status = "okay";
+		};
+
+		lpuart1: serial at 40184000 {
+			compatible = "fsl,imxrt-lpuart";
+			reg = <0x40184000 0x4000>;
+			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clks IMXRT1020_CLK_LPUART1>;
+			clock-names = "per";
+			status = "disabled";
+		};
+
+		iomuxc: iomuxc at 401f8000 {
+			compatible = "fsl,imxrt-iomuxc";
+			reg = <0x401f8000 0x4000>;
+			fsl,mux_mask = <0x7>;
+		};
+
+		clks: ccm at 400fc000 {
+			u-boot,dm-spl;
+			compatible = "fsl,imxrt1020-ccm";
+			reg = <0x400fc000 0x4000>;
+			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+			#clock-cells = <1>;
+		};
+
+		usdhc1: usdhc at 402c0000 {
+			u-boot,dm-spl;
+			compatible = "fsl,imxrt-usdhc";
+			reg = <0x402c0000 0x10000>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clks IMXRT1020_CLK_USDHC1>;
+			clock-names = "per";
+			bus-width = <4>;
+			fsl,tuning-start-tap = <20>;
+			fsl,tuning-step= <2>;
+			status = "disabled";
+		};
+
+		gpio1: gpio at 401b8000 {
+			u-boot,dm-spl;
+			compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+			reg = <0x401b8000 0x4000>;
+			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio2: gpio at 401bc000 {
+			u-boot,dm-spl;
+			compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+			reg = <0x401bc000 0x4000>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio3: gpio at 401c0000 {
+			u-boot,dm-spl;
+			compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+			reg = <0x401c0000 0x4000>;
+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+	};
+};
-- 
2.20.1

  parent reply	other threads:[~2020-02-18 19:02 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-18 19:02 [PATCH 0/5] i.MXRT1020 add basic support Giulio Benetti
2020-02-18 19:02 ` [PATCH 1/5] clk: imx: add i.IMXRT1020 clk driver Giulio Benetti
2020-02-20 22:33   ` Lukasz Majewski
2020-04-19  9:08   ` sbabic at denx.de
2020-02-18 19:02 ` [PATCH 2/5] Add i.MXRT1020 support Giulio Benetti
2020-02-20 22:35   ` Lukasz Majewski
2020-04-19  9:09   ` sbabic at denx.de
2020-02-18 19:02 ` Giulio Benetti [this message]
2020-02-20 22:45   ` [PATCH 3/5] ARM: dts: imxrt1020: add dtsi file Lukasz Majewski
2020-02-20 22:50     ` Giulio Benetti
2020-04-19  9:08   ` sbabic at denx.de
2020-02-18 19:02 ` [PATCH 4/5] dt-bindings: pinctrl: add i.MXRT1020 pins definition Giulio Benetti
2020-02-20 22:51   ` Lukasz Majewski
2020-02-20 22:55     ` Giulio Benetti
2020-02-25 13:59     ` Giulio Benetti
2020-04-19  9:09   ` sbabic at denx.de
2020-02-18 19:02 ` [PATCH 5/5] Add support for i.MXRT1020-EVK board Giulio Benetti
2020-02-20 23:00   ` Lukasz Majewski
2020-04-19  9:08   ` sbabic at denx.de
2020-04-18 12:32 ` [PATCH 0/5] i.MXRT1020 add basic support Giulio Benetti
2020-04-18 12:57   ` Stefano Babic
2020-04-18 15:38     ` Giulio Benetti

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