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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v5 04/33] clk: Add functions to register CCF clock structs
Date: Fri, 28 Feb 2020 16:05:22 -0500	[thread overview]
Message-ID: <20200228210552.615672-5-seanga2@gmail.com> (raw)
In-Reply-To: <20200228210552.615672-1-seanga2@gmail.com>

This patch adds alternate versions of the clk_*_register functions for use
with statically-allocated struct clks. This allows drivers to define clocks
at compile-time and register them at run-time without malloc-ing. This
increases the size of the binary, but should not affect ram usage (since
the clocks now no longer live on the heap).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

Changes in v5:
- New

 drivers/clk/clk-composite.c  | 103 +++++++++++++++++++----------------
 drivers/clk/clk-divider.c    |  56 +++++++++----------
 drivers/clk/clk-gate.c       |  38 ++++++++-----
 include/linux/clk-provider.h |   9 +++
 4 files changed, 112 insertions(+), 94 deletions(-)

diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 819bfca2fc..b328c4e5a5 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -95,6 +95,51 @@ static int clk_composite_disable(struct clk *clk)
 		return 0;
 }
 
+struct clk *clk_register_composite_struct(const char *name,
+					  const char * const *parent_names,
+					  int num_parents,
+					  struct clk_composite *composite)
+{
+	int ret;
+	struct clk *clk;
+
+	if (!num_parents || (num_parents != 1 && !composite->mux))
+		return ERR_PTR(-EINVAL);
+
+	if (composite->mux && composite->mux_ops)
+		composite->mux->data = (ulong)composite;
+
+	if (composite->rate && composite->rate_ops) {
+		if (!composite->rate_ops->get_rate)
+			return ERR_PTR(-EINVAL);
+
+		composite->rate->data = (ulong)composite;
+	}
+
+	if (composite->gate && composite->gate_ops) {
+		if (!composite->gate_ops->enable ||
+		    !composite->gate_ops->disable)
+			return ERR_PTR(-EINVAL);
+
+		composite->gate->data = (ulong)composite;
+	}
+
+	clk = &composite->clk;
+	ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
+			   parent_names[clk_composite_get_parent(clk)]);
+	if (ret)
+		clk = ERR_PTR(ret);
+
+	if (composite->mux)
+		composite->mux->dev = clk->dev;
+	if (composite->rate)
+		composite->rate->dev = clk->dev;
+	if (composite->gate)
+		composite->gate->dev = clk->dev;
+
+	return clk;
+}
+
 struct clk *clk_register_composite(struct device *dev, const char *name,
 				   const char * const *parent_names,
 				   int num_parents, struct clk *mux,
@@ -107,62 +152,24 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
 {
 	struct clk *clk;
 	struct clk_composite *composite;
-	int ret;
-
-	if (!num_parents || (num_parents != 1 && !mux))
-		return ERR_PTR(-EINVAL);
 
 	composite = kzalloc(sizeof(*composite), GFP_KERNEL);
 	if (!composite)
 		return ERR_PTR(-ENOMEM);
 
-	if (mux && mux_ops) {
-		composite->mux = mux;
-		composite->mux_ops = mux_ops;
-		mux->data = (ulong)composite;
-	}
+	composite->mux = mux;
+	composite->mux_ops = mux_ops;
 
-	if (rate && rate_ops) {
-		if (!rate_ops->get_rate) {
-			clk = ERR_PTR(-EINVAL);
-			goto err;
-		}
+	composite->rate = rate;
+	composite->rate_ops = rate_ops;
 
-		composite->rate = rate;
-		composite->rate_ops = rate_ops;
-		rate->data = (ulong)composite;
-	}
+	composite->gate = gate;
+	composite->gate_ops = gate_ops;
 
-	if (gate && gate_ops) {
-		if (!gate_ops->enable || !gate_ops->disable) {
-			clk = ERR_PTR(-EINVAL);
-			goto err;
-		}
-
-		composite->gate = gate;
-		composite->gate_ops = gate_ops;
-		gate->data = (ulong)composite;
-	}
-
-	clk = &composite->clk;
-	ret = clk_register(clk, UBOOT_DM_CLK_COMPOSITE, name,
-			   parent_names[clk_composite_get_parent(clk)]);
-	if (ret) {
-		clk = ERR_PTR(ret);
-		goto err;
-	}
-
-	if (composite->mux)
-		composite->mux->dev = clk->dev;
-	if (composite->rate)
-		composite->rate->dev = clk->dev;
-	if (composite->gate)
-		composite->gate->dev = clk->dev;
-
-	return clk;
-
-err:
-	kfree(composite);
+	clk = clk_register_composite_struct(name, parent_names, num_parents,
+					    composite);
+	if (IS_ERR(clk))
+		kfree(composite);
 	return clk;
 }
 
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 5fe1c3941f..747504d0a0 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -178,22 +178,37 @@ const struct clk_ops clk_divider_ops = {
 	.set_rate = clk_divider_set_rate,
 };
 
-static struct clk *_register_divider(struct device *dev, const char *name,
-		const char *parent_name, unsigned long flags,
-		void __iomem *reg, u8 shift, u8 width,
-		u8 clk_divider_flags, const struct clk_div_table *table)
+struct clk *clk_register_divider_struct(const char *name,
+					const char *parent_name,
+					struct clk_divider *div)
 {
-	struct clk_divider *div;
-	struct clk *clk;
 	int ret;
+	struct clk *clk;
 
-	if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
-		if (width + shift > 16) {
+	if (div->flags & CLK_DIVIDER_HIWORD_MASK) {
+		if (div->width + div->shift > 16) {
 			pr_warn("divider value exceeds LOWORD field\n");
 			return ERR_PTR(-EINVAL);
 		}
 	}
 
+	/* register the clock */
+	clk = &div->clk;
+
+	ret = clk_register(clk, UBOOT_DM_CLK_CCF_DIVIDER, name, parent_name);
+	if (ret)
+		return ERR_PTR(ret);
+	return clk;
+}
+
+struct clk *clk_register_divider(struct device *dev, const char *name,
+				 const char *parent_name, unsigned long flags,
+				 void __iomem *reg, u8 shift, u8 width,
+				 u8 clk_divider_flags)
+{
+	struct clk_divider *div;
+	struct clk *clk;
+
 	/* allocate the divider */
 	div = kzalloc(sizeof(*div), GFP_KERNEL);
 	if (!div)
@@ -204,34 +219,13 @@ static struct clk *_register_divider(struct device *dev, const char *name,
 	div->shift = shift;
 	div->width = width;
 	div->flags = clk_divider_flags;
-	div->table = table;
 #if CONFIG_IS_ENABLED(SANDBOX_CLK_CCF)
 	div->io_divider_val = *(u32 *)reg;
 #endif
 
-	/* register the clock */
-	clk = &div->clk;
-
-	ret = clk_register(clk, UBOOT_DM_CLK_CCF_DIVIDER, name, parent_name);
-	if (ret) {
-		kfree(div);
-		return ERR_PTR(ret);
-	}
-
-	return clk;
-}
-
-struct clk *clk_register_divider(struct device *dev, const char *name,
-		const char *parent_name, unsigned long flags,
-		void __iomem *reg, u8 shift, u8 width,
-		u8 clk_divider_flags)
-{
-	struct clk *clk;
-
-	clk =  _register_divider(dev, name, parent_name, flags, reg, shift,
-				 width, clk_divider_flags, NULL);
+	clk = clk_register_divider_struct(name, parent_name, div);
 	if (IS_ERR(clk))
-		return ERR_CAST(clk);
+		kfree(div);
 	return clk;
 }
 
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index b5827dced0..82445d2ccb 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -111,6 +111,27 @@ const struct clk_ops clk_gate_ops = {
 	.get_rate = clk_generic_get_rate,
 };
 
+struct clk *clk_register_gate_struct(const char *name, const char *parent_name,
+				     struct clk_gate *gate)
+{
+	int ret;
+	struct clk *clk;
+
+	if (gate->flags & CLK_GATE_HIWORD_MASK) {
+		if (gate->bit_idx > 15) {
+			pr_err("gate bit exceeds LOWORD field\n");
+			return ERR_PTR(-EINVAL);
+		}
+	}
+
+	clk = &gate->clk;
+
+	ret = clk_register(clk, UBOOT_DM_CLK_GATE, name, parent_name);
+	if (ret)
+		return ERR_PTR(ret);
+	return clk;
+}
+
 struct clk *clk_register_gate(struct device *dev, const char *name,
 			      const char *parent_name, unsigned long flags,
 			      void __iomem *reg, u8 bit_idx,
@@ -118,14 +139,6 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
 {
 	struct clk_gate *gate;
 	struct clk *clk;
-	int ret;
-
-	if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
-		if (bit_idx > 15) {
-			pr_err("gate bit exceeds LOWORD field\n");
-			return ERR_PTR(-EINVAL);
-		}
-	}
 
 	/* allocate the gate */
 	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
@@ -140,14 +153,9 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
 	gate->io_gate_val = *(u32 *)reg;
 #endif
 
-	clk = &gate->clk;
-
-	ret = clk_register(clk, UBOOT_DM_CLK_GATE, name, parent_name);
-	if (ret) {
+	clk = clk_register_gate_struct(name, parent_name, gate);
+	if (IS_ERR(clk))
 		kfree(gate);
-		return ERR_PTR(ret);
-	}
-
 	return clk;
 }
 
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 8a20743ad8..8bf8dca0a3 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -95,6 +95,8 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
 			      const char *parent_name, unsigned long flags,
 			      void __iomem *reg, u8 bit_idx,
 			      u8 clk_gate_flags, spinlock_t *lock);
+struct clk *clk_register_gate_struct(const char *name, const char *parent_name,
+				     struct clk_gate *gate);
 
 struct clk_div_table {
 	unsigned int	val;
@@ -166,6 +168,10 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
 		struct clk *rate_clk, const struct clk_ops *rate_ops,
 		struct clk *gate_clk, const struct clk_ops *gate_ops,
 		unsigned long flags);
+struct clk *clk_register_composite_struct(const char *name,
+					  const char * const *parent_names,
+					  int num_parents,
+					  struct clk_composite *composite);
 
 int clk_register(struct clk *clk, const char *drv_name, const char *name,
 		 const char *parent_name);
@@ -178,6 +184,9 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
 		const char *parent_name, unsigned long flags,
 		void __iomem *reg, u8 shift, u8 width,
 		u8 clk_divider_flags);
+struct clk *clk_register_divider_struct(const char *name,
+					const char *parent_name,
+					struct clk_divider *div);
 
 struct clk *clk_register_mux(struct device *dev, const char *name,
 		const char * const *parent_names, u8 num_parents,
-- 
2.25.0

  parent reply	other threads:[~2020-02-28 21:05 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-28 21:05 [PATCH v5 00/33] riscv: Add Sipeed Maix support Sean Anderson
2020-02-28 21:05 ` [PATCH v5 01/33] clk: Always use the supplied struct clk Sean Anderson
2020-02-28 21:05 ` [PATCH v5 02/33] clk: Check that ops of composite clock components exist before calling Sean Anderson
2020-02-28 21:05 ` [PATCH v5 03/33] clk: Unconditionally recursively en-/dis-able clocks Sean Anderson
2020-03-04  6:50   ` Rick Chen
2020-02-28 21:05 ` Sean Anderson [this message]
2020-02-28 21:05 ` [PATCH v5 05/33] clk: Add K210 pll support Sean Anderson
2020-02-28 21:05 ` [PATCH v5 06/33] clk: Add a bypass clock for K210 Sean Anderson
2020-02-28 21:05 ` [PATCH v5 07/33] clk: Add K210 clock support Sean Anderson
2020-03-04  6:58   ` Rick Chen
2020-03-04 14:54     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 08/33] doc: Fix typo in FIT documentation Sean Anderson
2020-03-02  2:21   ` Bin Meng
2020-02-28 21:05 ` [PATCH v5 09/33] dm: Add support for simple-pm-bus Sean Anderson
2020-02-28 21:05 ` [PATCH v5 10/33] dm: Fix error handling for dev_read_addr_ptr Sean Anderson
2020-03-02  2:22   ` Bin Meng
2020-03-02 19:46   ` Simon Glass
2020-02-28 21:05 ` [PATCH v5 11/33] reset: Add generic reset driver Sean Anderson
2020-02-28 21:05 ` [PATCH v5 12/33] lib: Always set errno in hcreate_r Sean Anderson
2020-03-02  2:24   ` Bin Meng
2020-02-28 21:05 ` [PATCH v5 13/33] pinctrl: Add support for Kendryte K210 FPIOA Sean Anderson
2020-03-04  6:47   ` Rick Chen
2020-03-04 15:00     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 14/33] gpio: sifive: Use generic reg read function Sean Anderson
2020-03-02  2:24   ` Bin Meng
2020-02-28 21:05 ` [PATCH v5 15/33] gpio: dw: Fix warnings about casting int to pointer Sean Anderson
2020-03-02  2:27   ` Bin Meng
2020-03-02  3:50     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 16/33] gpio: dw: Add a trailing underscore to generated name Sean Anderson
2020-02-28 21:05 ` [PATCH v5 17/33] gpio: dw: Return output value when direction is out Sean Anderson
2020-02-28 21:05 ` [PATCH v5 18/33] led: gpio: Default to using node name if label is absent Sean Anderson
2020-02-28 21:05 ` [PATCH v5 19/33] spi: dw: Add device tree properties for fields in CTRL1 Sean Anderson
2020-03-04  6:15   ` Rick Chen
2020-03-04 15:01     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 20/33] spi: dw: Rename "cs-gpio" to "cs-gpios" Sean Anderson
2020-02-28 21:05 ` [PATCH v5 21/33] spi: dw: Use generic function to read reg address Sean Anderson
2020-02-28 21:05 ` [PATCH v5 22/33] spi: dw: Speed up transfer loops Sean Anderson
2020-02-28 21:05 ` [PATCH v5 23/33] spi: dw: Properly set rx_end when not recieving Sean Anderson
2020-02-29 17:47   ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 24/33] spi: dw: Add mem_ops Sean Anderson
2020-02-28 21:05 ` [PATCH v5 25/33] wdt: Move asm/utils.h to log2.h Sean Anderson
2020-02-28 21:46   ` Marek Vasut
2020-02-28 22:43     ` Sean Anderson
2020-02-28 23:27       ` Marek Vasut
2020-03-03  6:58   ` Rick Chen
2020-03-03 14:11     ` Sean Anderson
2020-02-28 21:05 ` [PATCH v5 26/33] riscv: Add headers for asm/global_data.h Sean Anderson
2020-02-28 21:05 ` [PATCH v5 27/33] riscv: Fix race conditions when initializing IPI Sean Anderson
2020-03-02  9:08   ` Rick Chen
2020-03-02 15:43     ` Sean Anderson
2020-03-02 23:15       ` Lukas Auer
2020-03-03  8:27         ` Rick Chen
2020-03-05  2:18           ` Rick Chen
2020-03-02 23:17   ` Lukas Auer
2020-03-02 23:43     ` Sean Anderson
2020-03-03 21:53       ` Lukas Auer
2020-03-03 21:57         ` Sean Anderson
2020-03-04 15:25           ` Lukas Auer
2020-02-28 21:05 ` [PATCH v5 28/33] riscv: Add option to support RISC-V privileged spec 1.9 Sean Anderson
2020-03-04  6:20   ` Rick Chen
2020-02-28 21:05 ` [PATCH v5 29/33] riscv: Allow use of reset drivers Sean Anderson
2020-02-28 21:05 ` [PATCH v5 30/33] riscv: Try to get cpu frequency from a "clocks" node if it exists Sean Anderson
2020-02-28 21:05 ` [PATCH v5 31/33] riscv: Enable cpu clock if it is present Sean Anderson
2020-02-28 21:05 ` [PATCH v5 32/33] riscv: Add device tree for K210 and Sipeed Maix BitM Sean Anderson
2020-02-28 21:05 ` [PATCH v5 33/33] riscv: Add Sipeed Maix support Sean Anderson
2020-03-04  6:04   ` Rick Chen
2020-03-04  7:47     ` Rick Chen
2020-03-04 15:11       ` Sean Anderson
2020-03-05  3:40         ` Bin Meng

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