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From: Lukasz Majewski <lukma@denx.de>
To: u-boot@lists.denx.de
Subject: [PATCH 03/18] clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL
Date: Mon, 9 Mar 2020 10:11:22 +0100	[thread overview]
Message-ID: <20200309101122.5acef914@jawa> (raw)
In-Reply-To: <f766712d-28e5-3599-3179-e8d81b174e94@benettiengineering.com>

On Sun, 8 Mar 2020 22:05:42 +0100
Giulio Benetti <giulio.benetti@benettiengineering.com> wrote:

> Hi Lukasz,
> 
> On 3/8/20 9:27 PM, Lukasz Majewski wrote:
> > On Wed, 26 Feb 2020 18:15:46 +0100
> > Giulio Benetti <giulio.benetti@benettiengineering.com> wrote:
> >   
> >> mxsfb needs PLL5 as source, so let's setup it and set it as source
> >> for mxsfb(lcdif).
> >>
> >> Signed-off-by: Giulio Benetti
> >> <giulio.benetti@benettiengineering.com> ---
> >>   drivers/clk/imx/clk-imxrt1050.c | 13 ++++++++++++-
> >>   1 file changed, 12 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/clk/imx/clk-imxrt1050.c
> >> b/drivers/clk/imx/clk-imxrt1050.c index e33d426363..2819ffb9ac
> >> 100644 --- a/drivers/clk/imx/clk-imxrt1050.c
> >> +++ b/drivers/clk/imx/clk-imxrt1050.c
> >> @@ -238,9 +238,9 @@ static int imxrt1050_clk_probe(struct udevice
> >> *dev) clk_dm(IMXRT1050_CLK_LCDIF,
> >>   	       imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70,
> >> 28));
> >> -#ifdef CONFIG_SPL_BUILD
> >>   	struct clk *clk, *clk1;
> >>   
> >> +#ifdef CONFIG_SPL_BUILD
> >>   	/* bypass pll1 before setting its rate */
> >>   	clk_get_by_id(IMXRT1050_CLK_PLL1_REF_SEL, &clk);
> >>   	clk_get_by_id(IMXRT1050_CLK_PLL1_BYPASS, &clk1);
> >> @@ -271,7 +271,18 @@ static int imxrt1050_clk_probe(struct udevice
> >> *dev)
> >>   	clk_get_by_id(IMXRT1050_CLK_PLL3_BYPASS, &clk1);
> >>   	clk_set_parent(clk1, clk);
> >> +#else
> >> +	/* Set PLL5 for LCDIF to its default 650Mhz */
> >> +	clk_get_by_id(IMXRT1050_CLK_PLL5_VIDEO, &clk);
> >> +	clk_enable(clk);
> >> +	clk_set_rate(clk, 650000000UL);
> >> +
> >> +	clk_get_by_id(IMXRT1050_CLK_PLL5_BYPASS, &clk1);
> >> +	clk_set_parent(clk1, clk);
> >>   
> >> +	/* Configure PLL5 as LCDIF source */
> >> +	clk_get_by_id(IMXRT1050_CLK_LCDIF_SEL, &clk1);
> >> +	clk_set_parent(clk1, clk);  
> 
> As pointed by Fabio, this ^^^ should be substituted with a using 
> assigned-parent-clocks in dts instead of being hardcoded here.

Upss.. Apparently I've missed the conversation. Thanks for pointing
this out.

> What do you think about it?

If it is relatively easy to do then I'm for it.

> 
> Thanks for reviewing and
> best regards




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
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  reply	other threads:[~2020-03-09  9:11 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-26 17:15 [PATCH 00/18] i.MXRT1050 add LCDIF support Giulio Benetti
2020-02-26 17:15 ` [PATCH 01/18] clk: imx: pllv3: add enable_bit Giulio Benetti
2020-03-08 20:27   ` Lukasz Majewski
2020-02-26 17:15 ` [PATCH 02/18] clk: imx: imxrt1050-clk: fix typo in clock name "video:" Giulio Benetti
2020-03-08 20:27   ` Lukasz Majewski
2020-02-26 17:15 ` [PATCH 03/18] clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL Giulio Benetti
2020-02-26 17:37   ` Fabio Estevam
2020-02-26 17:54     ` Giulio Benetti
2020-02-26 17:59       ` Fabio Estevam
2020-02-26 18:16         ` Giulio Benetti
2020-02-27 18:31           ` Fabio Estevam
2020-03-08 20:27   ` Lukasz Majewski
2020-03-08 21:05     ` Giulio Benetti
2020-03-09  9:11       ` Lukasz Majewski [this message]
2020-03-22 18:25         ` Giulio Benetti
2020-02-26 17:15 ` [PATCH 04/18] videomodes: add helper function to convert from ctfb to display_timing Giulio Benetti
2020-02-26 17:15 ` [PATCH 05/18] sunxi: display: use common video_ctfb_mode_to_display_timing() Giulio Benetti
2020-02-26 17:15 ` [PATCH 06/18] video: mxsfb: add support for DM CLK Giulio Benetti
2020-02-26 17:15 ` [PATCH 07/18] video: mxsfb: add support for i.MXRT Giulio Benetti
2020-02-26 17:15 ` [PATCH 08/18] video: mxsfb: refactor for using display_timings Giulio Benetti
2020-02-26 17:15 ` [PATCH 09/18] video: mxsfb: enable setting HSYNC negative polarity Giulio Benetti
2020-02-26 17:15 ` [PATCH 10/18] video: mxsfb: enable setting VSYNC " Giulio Benetti
2020-02-26 17:15 ` [PATCH 11/18] video: mxsfb: enable setting PIXDATA on negative edge Giulio Benetti
2020-02-26 17:15 ` [PATCH 12/18] video: mxsfb: enable setting ENABLE negative polarity Giulio Benetti
2020-02-26 17:15 ` [PATCH 13/18] imxrt1050_evk: add 16bpp video support if video layer enabled Giulio Benetti
2020-02-26 17:15 ` [PATCH 14/18] ARM: dts: i.mxrt1050: add lcdif node Giulio Benetti
2020-02-26 17:15 ` [PATCH 15/18] ARM: dts: imxrt1050: allow this dtsi file to be compiled in Linux Giulio Benetti
2020-02-26 17:39 ` [PATCH 00/18] i.MXRT1050 add LCDIF support Giulio Benetti
2020-03-22 18:27 ` Giulio Benetti

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