From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: u-boot@lists.denx.de
Subject: [PATCH] versal: watchdog: Add support for Xilinx window watchdog
Date: Wed, 11 Mar 2020 13:54:58 +0200 [thread overview]
Message-ID: <20200311115458.GH1922688@smile.fi.intel.com> (raw)
In-Reply-To: <66f1396f-bb10-90dd-6bbf-49615a1ac26a@xilinx.com>
On Wed, Mar 11, 2020 at 12:34:33PM +0100, Michal Simek wrote:
> On 11. 03. 20 12:25, Stefan Roese wrote:
> > On 11.03.20 11:48, Michal Simek wrote:
> >> From: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
> >> +struct wwdt_regs {
> >> +??? u32 reserved0[1024];
> >> +??? u32 refresh;??????? /* Refresh Register [0x1000] */
> >> +??? u32 reserved1[1023];
> >> +??? u32 csr;??????? /* Control/Status Register [0x2000] */
> >> +??? u32 reserved2;
> >> +??? u32 offset;??????? /* Offset Register [0x2008] */
> >> +??? u32 reserved3;
> >> +??? u32 cmp0;??????? /* Compare Value Register0 [0x2010] */
> >> +??? u32 cmp1;??????? /* Compare Value Register1 [0x2014] */
> >> +??? u32 reserved4[1006];
> >> +??? u32 warmrst;??????? /* Warm Reset Register [0x2FD0] */
> >> +};
> >
> > My understanding is, that we moved to using defines instead of structs
> > for register definitions. So if you need to send a v2, then please
> > consider using #defines here.
>
> When was that decision done? Any link to documentation/commit message?
>
> Origin driver had macros but I have asked Ashok to change it to
> structure based.
I don't know how many wasted kbytes Xilinx can afford, but in general it's a
bad example to waste memory as above.
Any issues with regmap approach?
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-03-11 11:54 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-11 10:48 [PATCH] versal: watchdog: Add support for Xilinx window watchdog Michal Simek
2020-03-11 11:25 ` Stefan Roese
2020-03-11 11:34 ` Michal Simek
2020-03-11 11:54 ` Andy Shevchenko [this message]
2020-03-11 12:31 ` Michal Simek
2020-03-11 11:56 ` Stefan Roese
2020-03-11 12:11 ` Michal Simek
2020-03-11 14:28 ` Tom Rini
2020-03-11 14:30 ` Michal Simek
2020-03-11 11:52 ` Andy Shevchenko
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