* [PATCH v1] x86: acpi: Describe USB 3 host controller found on Intel Tangier
@ 2020-03-25 16:46 Andy Shevchenko
2020-03-26 2:05 ` Bin Meng
0 siblings, 1 reply; 2+ messages in thread
From: Andy Shevchenko @ 2020-03-25 16:46 UTC (permalink / raw)
To: u-boot
USB 3 host controller may be described in ACPI to allow users alter
the properties or other features. Describe it for Intel Tangier SoC.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
.../asm/arch-tangier/acpi/southcluster.asl | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
index 6ccdc25136..953780a936 100644
--- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
+++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
@@ -321,6 +321,44 @@ Device (PCI0)
}
}
+ Device (DWC3)
+ {
+ Name (_ADR, 0x00110000)
+ Name (_DEP, Package ()
+ {
+ ^IPC1.PMIC
+ })
+
+ Method (_STA, 0, NotSerialized)
+ {
+ Return (STA_VISIBLE)
+ }
+
+ Device (RHUB)
+ {
+ Name (_ADR, Zero)
+
+ // GPLD: Generate Port Location Data (PLD)
+ Method (GPLD, 1, Serialized) {
+ Name (PCKG, Package () {
+ Buffer (0x10) {}
+ })
+
+ // REV: Revision 0x02 for ACPI 5.0
+ CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)
+ Store (0x02, REV)
+
+ // VISI: Port visibility to user per port
+ CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI)
+ Store (Arg0, VISI)
+ Return (PCKG)
+ }
+
+ Device (HS01) { Name (_ADR, 1) }
+ Device (SS01) { Name (_ADR, 2) }
+ }
+ }
+
Device (PWM0)
{
Name (_ADR, 0x00170000)
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH v1] x86: acpi: Describe USB 3 host controller found on Intel Tangier
2020-03-25 16:46 [PATCH v1] x86: acpi: Describe USB 3 host controller found on Intel Tangier Andy Shevchenko
@ 2020-03-26 2:05 ` Bin Meng
0 siblings, 0 replies; 2+ messages in thread
From: Bin Meng @ 2020-03-26 2:05 UTC (permalink / raw)
To: u-boot
On Thu, Mar 26, 2020 at 12:46 AM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:
>
> USB 3 host controller may be described in ACPI to allow users alter
> the properties or other features. Describe it for Intel Tangier SoC.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
> .../asm/arch-tangier/acpi/southcluster.asl | 38 +++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
> index 6ccdc25136..953780a936 100644
> --- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
> +++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
> @@ -321,6 +321,44 @@ Device (PCI0)
> }
> }
>
> + Device (DWC3)
> + {
> + Name (_ADR, 0x00110000)
> + Name (_DEP, Package ()
> + {
> + ^IPC1.PMIC
> + })
> +
> + Method (_STA, 0, NotSerialized)
> + {
> + Return (STA_VISIBLE)
> + }
> +
> + Device (RHUB)
> + {
> + Name (_ADR, Zero)
> +
> + // GPLD: Generate Port Location Data (PLD)
nits: please use /* */
> + Method (GPLD, 1, Serialized) {
> + Name (PCKG, Package () {
> + Buffer (0x10) {}
> + })
> +
> + // REV: Revision 0x02 for ACPI 5.0
> + CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)
> + Store (0x02, REV)
> +
> + // VISI: Port visibility to user per port
> + CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI)
> + Store (Arg0, VISI)
> + Return (PCKG)
> + }
> +
> + Device (HS01) { Name (_ADR, 1) }
> + Device (SS01) { Name (_ADR, 2) }
> + }
> + }
> +
> Device (PWM0)
> {
> Name (_ADR, 0x00170000)
Otherwise, looks good to me
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-03-26 2:05 ` Bin Meng
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