From: Ovidiu Panait <ovpanait@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c
Date: Sun, 29 Mar 2020 20:57:39 +0300 [thread overview]
Message-ID: <20200329175741.26297-2-ovpanait@gmail.com> (raw)
In-Reply-To: <20200329175741.26297-1-ovpanait@gmail.com>
Move the ARM-specific reserve_mmu definition from common/board_f.c
to arch/arm/lib/cache.c.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
---
arch/arm/lib/cache.c | 28 ++++++++++++++++++++++++++++
common/board_f.c | 28 ----------------------------
2 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 007d4ebc49..b8e1e340a1 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -10,6 +10,8 @@
#include <cpu_func.h>
#include <malloc.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Flush range from all levels of d-cache/unified-cache.
* Affects the range [start, start + size - 1].
@@ -118,3 +120,29 @@ void invalidate_l2_cache(void)
isb();
}
#endif
+
+__weak int reserve_mmu(void)
+{
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ /* reserve TLB table */
+ gd->arch.tlb_size = PGTABLE_SIZE;
+ gd->relocaddr -= gd->arch.tlb_size;
+
+ /* round down to next 64 kB limit */
+ gd->relocaddr &= ~(0x10000 - 1);
+
+ gd->arch.tlb_addr = gd->relocaddr;
+ debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
+ gd->arch.tlb_addr + gd->arch.tlb_size);
+
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+ /*
+ * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
+ * with location within secure ram.
+ */
+ gd->arch.tlb_allocated = gd->arch.tlb_addr;
+#endif
+#endif
+
+ return 0;
+}
diff --git a/common/board_f.c b/common/board_f.c
index 82a164752a..a88bd64630 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -385,34 +385,6 @@ static int reserve_round_4k(void)
return 0;
}
-#ifdef CONFIG_ARM
-__weak int reserve_mmu(void)
-{
-#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
- /* reserve TLB table */
- gd->arch.tlb_size = PGTABLE_SIZE;
- gd->relocaddr -= gd->arch.tlb_size;
-
- /* round down to next 64 kB limit */
- gd->relocaddr &= ~(0x10000 - 1);
-
- gd->arch.tlb_addr = gd->relocaddr;
- debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
- gd->arch.tlb_addr + gd->arch.tlb_size);
-
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
- /*
- * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
- * with location within secure ram.
- */
- gd->arch.tlb_allocated = gd->arch.tlb_addr;
-#endif
-#endif
-
- return 0;
-}
-#endif
-
static int reserve_video(void)
{
#ifdef CONFIG_DM_VIDEO
--
2.17.1
next prev parent reply other threads:[~2020-03-29 17:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-29 17:57 [PATCH v2 0/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
2020-03-29 17:57 ` Ovidiu Panait [this message]
2020-03-30 23:56 ` [PATCH v2 1/3] common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c Simon Glass
2020-04-26 11:25 ` Tom Rini
2020-03-29 17:57 ` [PATCH v2 2/3] arm: asm/cache.c: Introduce arm_reserve_mmu Ovidiu Panait
2020-03-30 23:57 ` Simon Glass
2020-04-26 11:26 ` Tom Rini
2020-03-29 17:57 ` [PATCH v2 3/3] common/board_f: Make reserve_mmu generic Ovidiu Panait
2020-03-30 23:57 ` Simon Glass
2020-04-26 11:26 ` Tom Rini
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