* [PATCH] mpc8379erdb: Convert to DM_MMC
@ 2020-04-03 21:36 ` sinan at writeme.com
2020-04-03 23:59 ` Jaehoon Chung
0 siblings, 1 reply; 7+ messages in thread
From: sinan at writeme.com @ 2020-04-03 21:36 UTC (permalink / raw)
To: u-boot
From: Sinan Akman <sinan@writeme.com>
Signed-off-by: Sinan Akman <sinan@writeme.com>
Cc: mario.six at gdsys.cc
---
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/mpc8379erdb.dts | 239 ++++++++++++++++++++++++++++++
board/freescale/mpc837xerdb/mpc837xerdb.c | 9 +-
configs/MPC837XERDB_defconfig | 5 +-
4 files changed, 252 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/dts/mpc8379erdb.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 3195351c9c..e3ec033096 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_MPC837XERDB) += mpc8379erdb.dtb
dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
diff --git a/arch/powerpc/dts/mpc8379erdb.dts b/arch/powerpc/dts/mpc8379erdb.dts
new file mode 100644
index 0000000000..33afaf9a94
--- /dev/null
+++ b/arch/powerpc/dts/mpc8379erdb.dts
@@ -0,0 +1,239 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8379E RDB Device Tree Source
+ *
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "fsl,mpc8379erdb";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8379 at 0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>; // 256MB at 0
+ };
+
+ localbus at e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ immr at e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+ ranges = <0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <0>;
+
+ wdt at 200 {
+ device_type = "watchdog";
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ gpio0: gpio at c00 {
+ #gpio-cells = <2>;
+ device_type = "gpio";
+ compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
+ reg = <0xc00 0x18>;
+ interrupts = <74 0x8>;
+ interrupt-parent = <&ipic>;
+ gpio-controller;
+ };
+
+ gpio2: gpio-controller at d00 {
+ #gpio-cells = <2>;
+ device_type = "gpio";
+ compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
+ reg = <0xd00 0x100>;
+ interrupts = <75 0x8>;
+ interrupt-parent = <&ipic>;
+ gpio-controller;
+ };
+
+ i2c at 3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+ };
+
+ i2c at 3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+ };
+
+ spi at 7000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl,spi";
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
+ mode = "cpu";
+ };
+
+ sdhc at 2e000 {
+ compatible = "fsl,esdhc";
+ reg = <0x2e000 0x1000>;
+ bus-width = <0x4>;
+ clock-frequency = <0>;
+ };
+
+ serial0: serial at 4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <133333333>;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ serial1: serial at 4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <133333333>;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ ipic: interrupt-controller at 700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ device_type = "ipic";
+ };
+
+ pmc: power at b00 {
+ compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ usb at 23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
+ phy_type = "ulpi";
+ sleep = <&pmc 0x00c00000>;
+ };
+
+ enet0: ethernet at 24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x24000 0x1000>;
+
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar", "fsl,tsec";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ tbi-handle = < &tbi0 >;
+ phy-handle = < &phy2 >;
+ fsl,magic-packet;
+
+ mdio at 520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x520 0x20>;
+
+ phy2: ethernet-phy at 2 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+ tbi0: tbi-phy at 11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ enet1: ethernet at 25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar", "fsl,tsec";
+ reg = <0x25000 0x1000>;
+ ranges = <0x0 0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
+ tbi-handle = <&tbi1>;
+ fsl,magic-packet;
+
+ mdio at 520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x520 0x20>;
+
+ tbi1: tbi-phy at 11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+ };
+
+};
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 45038acf32..9321952674 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -136,8 +136,8 @@ int checkboard(void)
int board_early_init_f(void)
{
-#ifdef CONFIG_FSL_SERDES
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+#ifdef CONFIG_FSL_SERDES
u32 spridr = in_be32(&immr->sysconf.spridr);
/* we check only part num, and don't look for CPU revisions */
@@ -164,10 +164,16 @@ int board_early_init_f(void)
break;
}
#endif /* CONFIG_FSL_SERDES */
+
+#ifdef CONFIG_FSL_ESDHC
+ clrsetbits_be32(&immr->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
+ clrsetbits_be32(&immr->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD);
+#endif
return 0;
}
#ifdef CONFIG_FSL_ESDHC
+#if !(CONFIG_IS_ENABLED(DM_MMC))
int board_mmc_init(bd_t *bd)
{
struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
@@ -186,6 +192,7 @@ int board_mmc_init(bd_t *bd)
return fsl_esdhc_mmc_init(bd);
}
#endif
+#endif
/*
* Miscellaneous late-boot configurations
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index fd8335ee4e..8ef193a6e5 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -160,7 +160,11 @@ CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb"
CONFIG_ENV_ADDR=0xFE080000
+CONFIG_DM=y
+CONFIG_DM_MMC=y
CONFIG_FSL_SATA=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
@@ -174,4 +178,3 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
--
2.14.5
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH] mpc8379erdb: Convert to DM_MMC
2020-04-03 21:36 ` [PATCH] mpc8379erdb: Convert to DM_MMC sinan at writeme.com
@ 2020-04-03 23:59 ` Jaehoon Chung
2020-04-04 0:08 ` Sinan Akman
2020-04-04 5:16 ` [PATCH v2 1/2] mpc8379erdb: Add device tree sinan at writeme.com
0 siblings, 2 replies; 7+ messages in thread
From: Jaehoon Chung @ 2020-04-03 23:59 UTC (permalink / raw)
To: u-boot
HI,
On 4/4/20 6:36 AM, sinan at writeme.com wrote:
> From: Sinan Akman <sinan@writeme.com>
>
I'm not sure but its subject is strange.
It's not only the converting to DM_MMC. you're adding mpc8397.dtb device-tree.
I think you don't add device-tree for only mmc.
It's better to separate patches. "Add devicetree...", " Convert to DM_MMC".
It's just my opinion.
Best Regards,
Jaehoon Chung
> Signed-off-by: Sinan Akman <sinan@writeme.com>
> Cc: mario.six at gdsys.cc
> ---
> arch/powerpc/dts/Makefile | 1 +
> arch/powerpc/dts/mpc8379erdb.dts | 239 ++++++++++++++++++++++++++++++
> board/freescale/mpc837xerdb/mpc837xerdb.c | 9 +-
> configs/MPC837XERDB_defconfig | 5 +-
> 4 files changed, 252 insertions(+), 2 deletions(-)
> create mode 100644 arch/powerpc/dts/mpc8379erdb.dts
>
> diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
> index 3195351c9c..e3ec033096 100644
> --- a/arch/powerpc/dts/Makefile
> +++ b/arch/powerpc/dts/Makefile
> @@ -1,5 +1,6 @@
> # SPDX-License-Identifier: GPL-2.0+
>
> +dtb-$(CONFIG_TARGET_MPC837XERDB) += mpc8379erdb.dtb
> dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb
> dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
> dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
> diff --git a/arch/powerpc/dts/mpc8379erdb.dts b/arch/powerpc/dts/mpc8379erdb.dts
> new file mode 100644
> index 0000000000..33afaf9a94
> --- /dev/null
> +++ b/arch/powerpc/dts/mpc8379erdb.dts
> @@ -0,0 +1,239 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * MPC8379E RDB Device Tree Source
> + *
> + * Copyright 2020 NXP
> + */
> +
> +/dts-v1/;
> +
> +/ {
> + compatible = "fsl,mpc8379erdb";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + aliases {
> + serial0 = &serial0;
> + serial1 = &serial1;
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + PowerPC,8379 at 0 {
> + device_type = "cpu";
> + reg = <0x0>;
> + d-cache-line-size = <32>;
> + i-cache-line-size = <32>;
> + d-cache-size = <32768>;
> + i-cache-size = <32768>;
> + timebase-frequency = <0>;
> + bus-frequency = <0>;
> + clock-frequency = <0>;
> + };
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x10000000>; // 256MB at 0
> + };
> +
> + localbus at e0005000 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "fsl,elbc", "simple-bus";
> + reg = <0xe0005000 0x1000>;
> + interrupts = <77 0x8>;
> + interrupt-parent = <&ipic>;
> + };
> +
> + immr at e0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + compatible = "simple-bus";
> + ranges = <0 0xe0000000 0x00100000>;
> + reg = <0xe0000000 0x00000200>;
> + bus-frequency = <0>;
> +
> + wdt at 200 {
> + device_type = "watchdog";
> + compatible = "mpc83xx_wdt";
> + reg = <0x200 0x100>;
> + };
> +
> + gpio0: gpio at c00 {
> + #gpio-cells = <2>;
> + device_type = "gpio";
> + compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
> + reg = <0xc00 0x18>;
> + interrupts = <74 0x8>;
> + interrupt-parent = <&ipic>;
> + gpio-controller;
> + };
> +
> + gpio2: gpio-controller at d00 {
> + #gpio-cells = <2>;
> + device_type = "gpio";
> + compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
> + reg = <0xd00 0x100>;
> + interrupts = <75 0x8>;
> + interrupt-parent = <&ipic>;
> + gpio-controller;
> + };
> +
> + i2c at 3000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cell-index = <0>;
> + compatible = "fsl-i2c";
> + reg = <0x3000 0x100>;
> + interrupts = <14 0x8>;
> + interrupt-parent = <&ipic>;
> + dfsrr;
> + };
> +
> + i2c at 3100 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cell-index = <1>;
> + compatible = "fsl-i2c";
> + reg = <0x3100 0x100>;
> + interrupts = <15 0x8>;
> + interrupt-parent = <&ipic>;
> + dfsrr;
> + };
> +
> + spi at 7000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + cell-index = <0>;
> + compatible = "fsl,spi";
> + reg = <0x7000 0x1000>;
> + interrupts = <16 0x8>;
> + interrupt-parent = <&ipic>;
> + mode = "cpu";
> + };
> +
> + sdhc at 2e000 {
> + compatible = "fsl,esdhc";
> + reg = <0x2e000 0x1000>;
> + bus-width = <0x4>;
> + clock-frequency = <0>;
> + };
> +
> + serial0: serial at 4500 {
> + cell-index = <0>;
> + device_type = "serial";
> + compatible = "fsl,ns16550", "ns16550";
> + reg = <0x4500 0x100>;
> + clock-frequency = <133333333>;
> + interrupts = <9 0x8>;
> + interrupt-parent = <&ipic>;
> + };
> +
> + serial1: serial at 4600 {
> + cell-index = <1>;
> + device_type = "serial";
> + compatible = "fsl,ns16550", "ns16550";
> + reg = <0x4600 0x100>;
> + clock-frequency = <133333333>;
> + interrupts = <10 0x8>;
> + interrupt-parent = <&ipic>;
> + };
> +
> + ipic: interrupt-controller at 700 {
> + compatible = "fsl,ipic";
> + interrupt-controller;
> + #address-cells = <0>;
> + #interrupt-cells = <2>;
> + reg = <0x700 0x100>;
> + device_type = "ipic";
> + };
> +
> + pmc: power at b00 {
> + compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
> + reg = <0xb00 0x100 0xa00 0x100>;
> + interrupts = <80 0x8>;
> + interrupt-parent = <&ipic>;
> + };
> +
> + usb at 23000 {
> + compatible = "fsl-usb2-dr";
> + reg = <0x23000 0x1000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + interrupt-parent = <&ipic>;
> + interrupts = <38 0x8>;
> + phy_type = "ulpi";
> + sleep = <&pmc 0x00c00000>;
> + };
> +
> + enet0: ethernet at 24000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x24000 0x1000>;
> +
> + cell-index = <0>;
> + device_type = "network";
> + model = "eTSEC";
> + compatible = "gianfar", "fsl,tsec";
> + reg = <0x24000 0x1000>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <32 0x8 33 0x8 34 0x8>;
> + interrupt-parent = <&ipic>;
> + tbi-handle = < &tbi0 >;
> + phy-handle = < &phy2 >;
> + fsl,magic-packet;
> +
> + mdio at 520 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,gianfar-mdio";
> + reg = <0x520 0x20>;
> +
> + phy2: ethernet-phy at 2 {
> + interrupt-parent = <&ipic>;
> + interrupts = <17 0x8>;
> + reg = <0x2>;
> + device_type = "ethernet-phy";
> + };
> + tbi0: tbi-phy at 11 {
> + reg = <0x11>;
> + device_type = "tbi-phy";
> + };
> + };
> + };
> +
> + enet1: ethernet at 25000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + cell-index = <1>;
> + device_type = "network";
> + model = "eTSEC";
> + compatible = "gianfar", "fsl,tsec";
> + reg = <0x25000 0x1000>;
> + ranges = <0x0 0x25000 0x1000>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <35 0x8 36 0x8 37 0x8>;
> + interrupt-parent = <&ipic>;
> + tbi-handle = <&tbi1>;
> + fsl,magic-packet;
> +
> + mdio at 520 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,gianfar-tbi";
> + reg = <0x520 0x20>;
> +
> + tbi1: tbi-phy at 11 {
> + reg = <0x11>;
> + device_type = "tbi-phy";
> + };
> + };
> + };
> + };
> +
> +};
> diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
> index 45038acf32..9321952674 100644
> --- a/board/freescale/mpc837xerdb/mpc837xerdb.c
> +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
> @@ -136,8 +136,8 @@ int checkboard(void)
>
> int board_early_init_f(void)
> {
> -#ifdef CONFIG_FSL_SERDES
> immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
> +#ifdef CONFIG_FSL_SERDES
> u32 spridr = in_be32(&immr->sysconf.spridr);
>
> /* we check only part num, and don't look for CPU revisions */
> @@ -164,10 +164,16 @@ int board_early_init_f(void)
> break;
> }
> #endif /* CONFIG_FSL_SERDES */
> +
> +#ifdef CONFIG_FSL_ESDHC
> + clrsetbits_be32(&immr->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
> + clrsetbits_be32(&immr->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD);
> +#endif
> return 0;
> }
>
> #ifdef CONFIG_FSL_ESDHC
> +#if !(CONFIG_IS_ENABLED(DM_MMC))
> int board_mmc_init(bd_t *bd)
> {
> struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
> @@ -186,6 +192,7 @@ int board_mmc_init(bd_t *bd)
> return fsl_esdhc_mmc_init(bd);
> }
> #endif
> +#endif
>
> /*
> * Miscellaneous late-boot configurations
> diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
> index fd8335ee4e..8ef193a6e5 100644
> --- a/configs/MPC837XERDB_defconfig
> +++ b/configs/MPC837XERDB_defconfig
> @@ -160,7 +160,11 @@ CONFIG_CMD_PING=y
> CONFIG_CMD_DATE=y
> CONFIG_CMD_EXT2=y
> CONFIG_CMD_FAT=y
> +CONFIG_OF_CONTROL=y
> +CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb"
> CONFIG_ENV_ADDR=0xFE080000
> +CONFIG_DM=y
> +CONFIG_DM_MMC=y
> CONFIG_FSL_SATA=y
> CONFIG_FSL_ESDHC=y
> CONFIG_MTD_NOR_FLASH=y
> @@ -174,4 +178,3 @@ CONFIG_SYS_NS16550=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_STORAGE=y
> -CONFIG_OF_LIBFDT=y
> --
> 2.14.5
>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH] mpc8379erdb: Convert to DM_MMC
2020-04-03 23:59 ` Jaehoon Chung
@ 2020-04-04 0:08 ` Sinan Akman
2020-04-04 5:16 ` [PATCH v2 1/2] mpc8379erdb: Add device tree sinan at writeme.com
1 sibling, 0 replies; 7+ messages in thread
From: Sinan Akman @ 2020-04-04 0:08 UTC (permalink / raw)
To: u-boot
? Hi Jehoon
On 2020-04-03 7:59 p.m., Jaehoon Chung wrote:
> HI,
>
> On 4/4/20 6:36 AM, sinan at writeme.com wrote:
>> From: Sinan Akman <sinan@writeme.com>
>>
> I'm not sure but its subject is strange.
> It's not only the converting to DM_MMC. you're adding mpc8397.dtb device-tree.
> I think you don't add device-tree for only mmc.
>
> It's better to separate patches. "Add devicetree...", " Convert to DM_MMC".
> It's just my opinion.
? You are right. I will split the patch into two and for dts I will
have only the related nodes.
? Thanks for your comments.
? Regards
? Sinan Akman
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] mpc8379erdb: Add device tree
2020-04-03 23:59 ` Jaehoon Chung
2020-04-04 0:08 ` Sinan Akman
@ 2020-04-04 5:16 ` sinan at writeme.com
2020-04-04 5:16 ` [PATCH v2 2/2] mpc8379erdb: Convert to DM_MMC sinan at writeme.com
2021-02-22 17:32 ` [PATCH v2 1/2] mpc8379erdb: Add device tree Tom Rini
1 sibling, 2 replies; 7+ messages in thread
From: sinan at writeme.com @ 2020-04-04 5:16 UTC (permalink / raw)
To: u-boot
From: Sinan Akman <sinan@writeme.com>
Signed-off-by: Sinan Akman <sinan@writeme.com>
---
Changes for v2:
- Split patches for device tree and DM_MMC
arch/powerpc/dts/Makefile | 1 +
arch/powerpc/dts/mpc8379erdb.dts | 74 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 75 insertions(+)
create mode 100644 arch/powerpc/dts/mpc8379erdb.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 3195351c9c..e3ec033096 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,5 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_MPC837XERDB) += mpc8379erdb.dtb
dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
diff --git a/arch/powerpc/dts/mpc8379erdb.dts b/arch/powerpc/dts/mpc8379erdb.dts
new file mode 100644
index 0000000000..b1881b161c
--- /dev/null
+++ b/arch/powerpc/dts/mpc8379erdb.dts
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * MPC8379E RDB Device Tree Source
+ *
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "fsl,mpc8379erdb";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8379 at 0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>; // 256MB at 0
+ };
+
+ localbus at e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,elbc", "simple-bus";
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ immr at e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+ ranges = <0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <0>;
+
+ sdhc at 2e000 {
+ compatible = "fsl,esdhc";
+ reg = <0x2e000 0x1000>;
+ bus-width = <0x4>;
+ clock-frequency = <0>;
+ };
+
+ ipic: interrupt-controller at 700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ device_type = "ipic";
+ };
+
+ };
+
+};
--
2.14.5
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] mpc8379erdb: Convert to DM_MMC
2020-04-04 5:16 ` [PATCH v2 1/2] mpc8379erdb: Add device tree sinan at writeme.com
@ 2020-04-04 5:16 ` sinan at writeme.com
2021-02-22 17:32 ` Tom Rini
2021-02-22 17:32 ` [PATCH v2 1/2] mpc8379erdb: Add device tree Tom Rini
1 sibling, 1 reply; 7+ messages in thread
From: sinan at writeme.com @ 2020-04-04 5:16 UTC (permalink / raw)
To: u-boot
From: Sinan Akman <sinan@writeme.com>
Signed-off-by: Sinan Akman <sinan@writeme.com>
---
Changes for v2:
- Split patches for device tree and DM_MMC
board/freescale/mpc837xerdb/mpc837xerdb.c | 9 ++++++++-
configs/MPC837XERDB_defconfig | 5 ++++-
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 45038acf32..9321952674 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -136,8 +136,8 @@ int checkboard(void)
int board_early_init_f(void)
{
-#ifdef CONFIG_FSL_SERDES
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+#ifdef CONFIG_FSL_SERDES
u32 spridr = in_be32(&immr->sysconf.spridr);
/* we check only part num, and don't look for CPU revisions */
@@ -164,10 +164,16 @@ int board_early_init_f(void)
break;
}
#endif /* CONFIG_FSL_SERDES */
+
+#ifdef CONFIG_FSL_ESDHC
+ clrsetbits_be32(&immr->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
+ clrsetbits_be32(&immr->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD);
+#endif
return 0;
}
#ifdef CONFIG_FSL_ESDHC
+#if !(CONFIG_IS_ENABLED(DM_MMC))
int board_mmc_init(bd_t *bd)
{
struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
@@ -186,6 +192,7 @@ int board_mmc_init(bd_t *bd)
return fsl_esdhc_mmc_init(bd);
}
#endif
+#endif
/*
* Miscellaneous late-boot configurations
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index fd8335ee4e..8ef193a6e5 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -160,7 +160,11 @@ CONFIG_CMD_PING=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="mpc8379erdb"
CONFIG_ENV_ADDR=0xFE080000
+CONFIG_DM=y
+CONFIG_DM_MMC=y
CONFIG_FSL_SATA=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
@@ -174,4 +178,3 @@ CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
--
2.14.5
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 1/2] mpc8379erdb: Add device tree
2020-04-04 5:16 ` [PATCH v2 1/2] mpc8379erdb: Add device tree sinan at writeme.com
2020-04-04 5:16 ` [PATCH v2 2/2] mpc8379erdb: Convert to DM_MMC sinan at writeme.com
@ 2021-02-22 17:32 ` Tom Rini
1 sibling, 0 replies; 7+ messages in thread
From: Tom Rini @ 2021-02-22 17:32 UTC (permalink / raw)
To: u-boot
On Sat, Apr 04, 2020 at 01:16:46AM -0400, sinan at writeme.com wrote:
> From: Sinan Akman <sinan@writeme.com>
>
> Signed-off-by: Sinan Akman <sinan@writeme.com>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/2] mpc8379erdb: Convert to DM_MMC
2020-04-04 5:16 ` [PATCH v2 2/2] mpc8379erdb: Convert to DM_MMC sinan at writeme.com
@ 2021-02-22 17:32 ` Tom Rini
0 siblings, 0 replies; 7+ messages in thread
From: Tom Rini @ 2021-02-22 17:32 UTC (permalink / raw)
To: u-boot
On Sat, Apr 04, 2020 at 01:16:47AM -0400, sinan at writeme.com wrote:
> From: Sinan Akman <sinan@writeme.com>
>
> Signed-off-by: Sinan Akman <sinan@writeme.com>
Applied to u-boot/master, thanks!
--
Tom
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2020-04-03 21:36 ` [PATCH] mpc8379erdb: Convert to DM_MMC sinan at writeme.com
2020-04-03 23:59 ` Jaehoon Chung
2020-04-04 0:08 ` Sinan Akman
2020-04-04 5:16 ` [PATCH v2 1/2] mpc8379erdb: Add device tree sinan at writeme.com
2020-04-04 5:16 ` [PATCH v2 2/2] mpc8379erdb: Convert to DM_MMC sinan at writeme.com
2021-02-22 17:32 ` Tom Rini
2021-02-22 17:32 ` [PATCH v2 1/2] mpc8379erdb: Add device tree Tom Rini
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